Skip EXT_REX_SSE_REG_P for vzeroupper optimization since upper 16 vector
registers don't trigger SSE <-> AVX transition penalty.
gcc/
PR target/95791
* config/i386/i386.c (ix86_dirflag_mode_needed): Skip
EXT_REX_SSE_REG_P.
gcc/testsuite/
PR target/95791
*
On Sun, Jun 21, 2020 at 1:06 AM H.J. Lu via Gcc-patches
wrote:
>
> Skip EXT_REX_SSE_REG_P for vzeroupper optimization since upper 16 vector
> registers don't trigger SSE <-> AVX transition penalty.
OK.
Richard.
> gcc/
>
> PR target/95791
> * config/i386/i386.c (ix86_dirflag_mode