RE: [PATCH]AArch64 relax predicate on load structure load instructions

2022-06-13 Thread Richard Biener via Gcc-patches
Marcus Shawcroft ; Kyrylo Tkachov > > ; ro...@eyesopen.com > > Subject: Re: [PATCH]AArch64 relax predicate on load structure load > > instructions > > > > On Mon, 13 Jun 2022, Richard Sandiford wrote: > > > > > Richard Biener writes

RE: [PATCH]AArch64 relax predicate on load structure load instructions

2022-06-13 Thread Tamar Christina via Gcc-patches
--Original Message- > > >> >> From: Richard Sandiford > > >> >> Sent: Wednesday, June 8, 2022 11:31 AM > > >> >> To: Tamar Christina > > >> >> Cc: gcc-patches@gcc.gnu.org; nd ; Richard Earnshaw > >

Re: [PATCH]AArch64 relax predicate on load structure load instructions

2022-06-13 Thread Richard Biener via Gcc-patches
t: Wednesday, June 8, 2022 11:31 AM > >> >> To: Tamar Christina > >> >> Cc: gcc-patches@gcc.gnu.org; nd ; Richard Earnshaw > >> >> ; Marcus Shawcroft > >> >> ; Kyrylo Tkachov > >> >> Subject: Re: [PATCH]AArch64 relax predicate

Re: [PATCH]AArch64 relax predicate on load structure load instructions

2022-06-13 Thread Richard Sandiford via Gcc-patches
>> >> Cc: gcc-patches@gcc.gnu.org; nd ; Richard Earnshaw >> >> ; Marcus Shawcroft >> >> ; Kyrylo Tkachov >> >> Subject: Re: [PATCH]AArch64 relax predicate on load structure load >> >> instructions >> >> >> >>

Re: [PATCH]AArch64 relax predicate on load structure load instructions

2022-06-13 Thread Richard Biener via Gcc-patches
d Earnshaw > >> ; Marcus Shawcroft > >> ; Kyrylo Tkachov > >> Subject: Re: [PATCH]AArch64 relax predicate on load structure load > >> instructions > >> > >> Tamar Christina writes: > >> > Hi All, > >> > > >>

RE: [PATCH]AArch64 relax predicate on load structure load instructions

2022-06-09 Thread Tamar Christina via Gcc-patches
>> Cc: gcc-patches@gcc.gnu.org; nd ; Richard Earnshaw > >> ; Marcus Shawcroft > >> ; Kyrylo Tkachov > ; > >> rguent...@suse.de; ro...@eyesopen.com > >> Subject: Re: [PATCH]AArch64 relax predicate on load structure load > >> instructions > >> >

Re: [PATCH]AArch64 relax predicate on load structure load instructions

2022-06-09 Thread Richard Sandiford via Gcc-patches
rguent...@suse.de; ro...@eyesopen.com >> Subject: Re: [PATCH]AArch64 relax predicate on load structure load >> instructions >> >> Tamar Christina writes: >> >> -Original Message- >> >> From: Richard Sandiford >> >> Sent: Wednesda

RE: [PATCH]AArch64 relax predicate on load structure load instructions

2022-06-09 Thread Tamar Christina via Gcc-patches
-patches@gcc.gnu.org; nd ; Richard Earnshaw > >> ; Marcus Shawcroft > >> ; Kyrylo Tkachov > > >> Subject: Re: [PATCH]AArch64 relax predicate on load structure load > >> instructions > >> > >> Tamar Christina writes: > >> > Hi A

Re: [PATCH]AArch64 relax predicate on load structure load instructions

2022-06-08 Thread Richard Sandiford via Gcc-patches
Tamar Christina writes: >> -Original Message- >> From: Richard Sandiford >> Sent: Wednesday, June 8, 2022 11:31 AM >> To: Tamar Christina >> Cc: gcc-patches@gcc.gnu.org; nd ; Richard Earnshaw >> ; Marcus Shawcroft >> ; Kyrylo Tkachov >

RE: [PATCH]AArch64 relax predicate on load structure load instructions

2022-06-08 Thread Tamar Christina via Gcc-patches
> -Original Message- > From: Richard Sandiford > Sent: Wednesday, June 8, 2022 11:31 AM > To: Tamar Christina > Cc: gcc-patches@gcc.gnu.org; nd ; Richard Earnshaw > ; Marcus Shawcroft > ; Kyrylo Tkachov > Subject: Re: [PATCH]AArch64 relax predicate on load struc

Re: [PATCH]AArch64 relax predicate on load structure load instructions

2022-06-08 Thread Richard Sandiford via Gcc-patches
Tamar Christina writes: > Hi All, > > At some point in time we started lowering the ld1r instructions in gimple. > > That is: > > uint8x8_t f1(const uint8_t *in) { > return vld1_dup_u8([1]); > } > > generates at gimple: > > _3 = MEM[(const uint8_t *)in_1(D) + 1B]; > _4 = {_3, _3, _3, _3,

[PATCH]AArch64 relax predicate on load structure load instructions

2022-06-08 Thread Tamar Christina via Gcc-patches
Hi All, At some point in time we started lowering the ld1r instructions in gimple. That is: uint8x8_t f1(const uint8_t *in) { return vld1_dup_u8([1]); } generates at gimple: _3 = MEM[(const uint8_t *)in_1(D) + 1B]; _4 = {_3, _3, _3, _3, _3, _3, _3, _3}; Which is good, but we then