Before implementing Zcmp, I did some optimizations and restructures to save-restore. https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=a5b2a3bff8152aa34408d8ce40add82f4d22ff87 https://gcc.gnu.org/git/?p=gcc.git;a=commitdiff;h=60524be1e3929d83e15fceac6e2aa053c8a6fb20 https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=a782346757c54a5a3cfb9f416a7ebe3554a617d7
Then Zcmp can share the same logic as save-restore in stack allocation: pre-allocation by cm.push, step 1 and step 2. please be noted cm.push pushes ra, s0-s11 in reverse order than what save-restore does. So adaption has been done in .cfi directives in my patch. A discussion be found here: https://github.com/riscv/riscv-code-size-reduction/issues/182 Weeks before, Jiawei also posted Zcmp in https://gcc.gnu.org/pipermail/gcc-patches/2023-April/615287.html. [PATCH 0/5] RISC-V: Support ZC* extensions. Jiawei [PATCH 1/5] RISC-V: Minimal support for ZC extensions. Jiawei [PATCH 2/5] RISC-V: Enable compressible features when use ZC* extensions. Jiawei [PATCH 3/5] RISC-V: Add ZC* test for march args being passed. Jiawei [PATCH 4/5] RISC-V: Add Zcmp extension supports. Jiawei [PATCH 5/5] RISC-V: Add ZCMP push/pop testcases. Jiawei I tested his codes and observed some issues in [PATCH 4/5], see https://www.mail-archive.com/gcc-patches@gcc.gnu.org/msg306921.html for details. So I plan to post my codes as an alternative of Jiawei's [PATCH 4/5]. My Zcmp switch codes are almost same as Jiawei's. So i avoid repeating them in my patch series. Please pick up Jiawei's [PATCH 1/5] before picking up my patch series. Fei Gao (1): [RISC-V] support cm.push cm.pop cm.popret in zcmp gcc/config/riscv/predicates.md | 148 +++ gcc/config/riscv/riscv-protos.h | 2 + gcc/config/riscv/riscv.cc | 477 +++++++- gcc/config/riscv/riscv.h | 23 + gcc/config/riscv/riscv.md | 2 + gcc/config/riscv/zc.md | 1042 +++++++++++++++++ gcc/testsuite/gcc.target/riscv/rv32e_zcmp.c | 239 ++++ gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c | 239 ++++ .../gcc.target/riscv/zcmp_stack_alignment.c | 23 + 9 files changed, 2155 insertions(+), 40 deletions(-) create mode 100644 gcc/config/riscv/zc.md create mode 100644 gcc/testsuite/gcc.target/riscv/rv32e_zcmp.c create mode 100644 gcc/testsuite/gcc.target/riscv/rv32i_zcmp.c create mode 100644 gcc/testsuite/gcc.target/riscv/zcmp_stack_alignment.c -- 2.17.1