Ping x2: [PATCH 1/2] Power10: Add IEEE 128-bit xsmaxcqp and xsmincqp support.

2020-12-10 Thread Michael Meissner via Gcc-patches
This patch has been around for quite some time. It isn't critical for enabling IEEE 128-bit long double, but it improves code generation for float128 on power10. I haven't received a reply for this patch: | Date: Sun, 15 Nov 2020 23:50:51 -0500 | Subject: [PATCH 1/2] Power10: Add IEEE 128-bit

Ping: [PATCH 1/2] Power10: Add IEEE 128-bit xsmaxcqp and xsmincqp support.

2020-12-03 Thread Michael Meissner via Gcc-patches
I haven't received a reply for this patch: | Date: Sun, 15 Nov 2020 23:50:51 -0500 | Subject: [PATCH 1/2] Power10: Add IEEE 128-bit xsmaxcqp and xsmincqp support. | Message-ID: <20201116045051.ga3...@ibm-toto.the-meissners.org> | https://gcc.gnu.org/pipermail/gcc-patches/2020-November/55916

[PATCH 1/2] Power10: Add IEEE 128-bit xsmaxcqp and xsmincqp support.

2020-11-15 Thread Michael Meissner via Gcc-patches
Power10: Add IEEE 128-bit xsmaxcqp and xsmincqp support. This patch adds the support for the IEEE 128-bit floating point C minimum and maximum instructions. The next patch will add the support for using the compare and set mask instruction to implement conditional moves. Originally, I tried to

[PATCH 1/2] Power10: Add IEEE 128-bit xsmaxcqp and xsmincqp support.

2020-09-21 Thread Michael Meissner via Gcc-patches
Power10: Add IEEE 128-bit xsmaxcqp and xsmincqp support. This patch adds the support for the IEEE 128-bit floating point C minimum and maximum instructions. The next patch will add the support for using the compare and set mask instruction to implement conditional moves. Rather than trying to