On 10/11/16 17:14, Wilco Dijkstra wrote:
> The second patch updates the Cortex-A57 scheduler now that we can
> differentiate
> between shifts and bitfield inserts. The Cortex-A57 Software Optimization
> Guide
> indicates that BFM operations use the integer multi-cycle pipeline, while ARM
> UXTB/
> On 10 Nov 2016, at 18:14, Wilco Dijkstra wrote:
>
> I think the XGene-1 scheduler might need a similar change as currently all
> AArch64
> shifts are modelled as 2-cycle operations.
Thanks for the heads-up. We’ll indeed need to update this.
Regards,
Philipp.
The second patch updates the Cortex-A57 scheduler now that we can differentiate
between shifts and bitfield inserts. The Cortex-A57 Software Optimization Guide
indicates that BFM operations use the integer multi-cycle pipeline, while ARM
UXTB/H instructions use the Integer 1 or Integer 0 pipelines
