Re: [PATCH 2/2] RISC-V: Handle implied extension for -march parser.

Hi Jim: > When I try this patch, I see an error: > > rohan:2132$ ./xgcc -B./ -O -march=rv64imafdc -mabi=lp64d tmp.c > /tmp/ccULN36f.s: Assembler messages: > /tmp/ccULN36f.s:3: Fatal error: > -march=rv64i2p0_m2p0_a2p0_f2p0_f2p0_d2p0_c2p0: ISA string is not in > canonical order. `f' > rohan:2133$

Re: [PATCH 2/2] RISC-V: Handle implied extension for -march parser.

On Tue, Mar 31, 2020 at 2:07 AM Kito Cheng wrote: > - Implied rule are introduced into latest RISC-V isa spec. > > - Only implemented D implied F-extension. Zicsr and Zifence are not > implement yet, so the rule not included in this patch. When I try this patch, I see an error:

[PATCH 2/2] RISC-V: Handle implied extension for -march parser.

- Implied rule are introduced into latest RISC-V isa spec. - Only implemented D implied F-extension. Zicsr and Zifence are not implement yet, so the rule not included in this patch. gcc/ChangeLog * common/config/riscv/riscv-common.c (riscv_implied_info_t): New.