In thumb2 we now generate a NEGS instruction rather than RSBS, so this test needs updating.
* gcc.target/arm/negdi-3.c: Update expected output to allow NEGS. --- gcc/testsuite/gcc.target/arm/negdi-3.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/gcc/testsuite/gcc.target/arm/negdi-3.c b/gcc/testsuite/gcc.target/arm/negdi-3.c index 76ddf49fc0d..1520e9c65df 100644 --- a/gcc/testsuite/gcc.target/arm/negdi-3.c +++ b/gcc/testsuite/gcc.target/arm/negdi-3.c @@ -8,10 +8,10 @@ signed long long negdi_zero_extendsidi (unsigned int x) } /* Expected output: - rsbs r0, r0, #0 + rsbs r0, r0, #0 (arm) | negs r0, r0 (thumb2) sbc r1, r1, r1 */ -/* { dg-final { scan-assembler-times "rsb" 1 } } */ +/* { dg-final { scan-assembler-times "rsbs|negs" 1 } } */ /* { dg-final { scan-assembler-times "sbc" 1 } } */ /* { dg-final { scan-assembler-times "mov" 0 } } */ /* { dg-final { scan-assembler-times "rsc" 0 } } */