On 12 August 2014 15:43, Alan Lawrence wrote:
> This patch adds SIMD register variants for and, ior, xor and not - similarly
> to add/sub, the H/W supports it, and it'll be more efficient if the values
> are there already, e.g. if passed as [u]int64x1_t parameters.
>
> gcc/ChangeLog:
>
> *
This patch adds SIMD register variants for and, ior, xor and not - similarly to
add/sub, the H/W supports it, and it'll be more efficient if the values are
there already, e.g. if passed as [u]int64x1_t parameters.
gcc/ChangeLog:
* config/aarch64/aarch64.md (3, one_cmpl2):
Add S
