Hi Juzhe,
I wasn't yet able to check this locally so just some minor comment nits:
> +/* Return the vectorization machine mode for RVV according to LMUL. */
> +machine_mode
> +preferred_simd_mode (scalar_mode mode)
> +{
> + /* We only enable auto-vectorization when TARGET_MIN_VLEN < 128 &&
> +
Just one minor comment otherwise LGTM.
> diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
> index 45a63cab9c9..1a35e02796d 100644
> --- a/gcc/config/riscv/riscv.cc
> +++ b/gcc/config/riscv/riscv.cc
> @@ -3793,6 +3793,14 @@ riscv_get_arg_info (struct riscv_arg_info *info, const
>
From: Juzhe-Zhong
This patch is fix patch of V2:
https://patchwork.sourceware.org/project/gcc/patch/20230419164214.1032017-3-juzhe.zh...@rivai.ai/.
Address comments from Kito && Robin, and fix issues && add testcases for them.
gcc/ChangeLog:
* config/riscv/riscv-protos.h (preferred_si
