On 11/01/2013 10:19 PM, Kirill Yukhin wrote:
Hello Richard,
On 21 Oct 16:01, Richard Henderson wrote:
Error on V16SF. Probably better to fill this out.
Thanks, fixed.
Better to just use sseinsnmode here, as it's a compile-time constant.
Fixed.
+(define_insn avx512f_storemode_mask
Hello,
On 05 Nov 16:05, Kirill Yukhin wrote:
Is it ok with that change?
Ping?
--
Thanks, K
On 11/05/2013 11:05 PM, Kirill Yukhin wrote:
Hello,
Small correction.
On 01 Nov 16:19, Kirill Yukhin wrote:
+(define_insn avx512f_storemode_mask
+ [(set (match_operand:VI48F_512 0 memory_operand =m)
+(vec_merge:VI48F_512
+ (match_operand:VI48F_512 1 register_operand v)
+
Hello,
On 01 Nov 16:19, Kirill Yukhin wrote:
Coould you pls take a look?
PING.
--
Thanks, K
Hello,
Small correction.
On 01 Nov 16:19, Kirill Yukhin wrote:
+(define_insn avx512f_storemode_mask
+ [(set (match_operand:VI48F_512 0 memory_operand =m)
+ (vec_merge:VI48F_512
+ (match_operand:VI48F_512 1 register_operand v)
+ (match_dup 0)
+
Hello Richard,
On 28 Oct 14:45, Richard Henderson wrote:
On 10/28/2013 01:58 PM, Kirill Yukhin wrote:
Hello Richard,
On 28 Oct 08:20, Richard Henderson wrote:
Why is a masked *scalar* operation useful?
The reason the instructions exist is so that
you can do fully fault correct
On 10/29/2013 03:02 AM, Kirill Yukhin wrote:
Hello Richard,
On 28 Oct 14:45, Richard Henderson wrote:
On 10/28/2013 01:58 PM, Kirill Yukhin wrote:
Hello Richard,
On 28 Oct 08:20, Richard Henderson wrote:
Why is a masked *scalar* operation useful?
The reason the instructions exist is so
Hello Richard,
On 22 Oct 08:16, Richard Henderson wrote:
On 10/22/2013 07:42 AM, Kirill Yukhin wrote:
Hello Richard,
Thanks for remarks, they all seems reasonable.
One question
On 21 Oct 16:01, Richard Henderson wrote:
+(define_insn avx512f_movesmode_mask
+ [(set
On 10/28/2013 03:24 AM, Kirill Yukhin wrote:
Hello Richard,
On 22 Oct 08:16, Richard Henderson wrote:
On 10/22/2013 07:42 AM, Kirill Yukhin wrote:
Hello Richard,
Thanks for remarks, they all seems reasonable.
One question
On 21 Oct 16:01, Richard Henderson wrote:
+(define_insn
Hello Richard,
On 28 Oct 08:20, Richard Henderson wrote:
Why is a masked *scalar* operation useful?
The reason the instructions exist is so that
you can do fully fault correct predicated scalar algorithms.
I example.
In fact, with some hacky tricks, you can fully predicate
normal C code in the
On 10/28/2013 01:58 PM, Kirill Yukhin wrote:
Hello Richard,
On 28 Oct 08:20, Richard Henderson wrote:
Why is a masked *scalar* operation useful?
The reason the instructions exist is so that
you can do fully fault correct predicated scalar algorithms.
Using VEC_MERGE isn't the proper
Hello Richard,
Thanks for remarks, they all seems reasonable.
One question
On 21 Oct 16:01, Richard Henderson wrote:
+(define_insn avx512f_movesmode_mask
+ [(set (match_operand:VF_128 0 register_operand =v)
+ (vec_merge:VF_128
+ (vec_merge:VF_128
+ (match_operand:VF_128 2
On 10/22/2013 07:42 AM, Kirill Yukhin wrote:
Hello Richard,
Thanks for remarks, they all seems reasonable.
One question
On 21 Oct 16:01, Richard Henderson wrote:
+(define_insn avx512f_movesmode_mask
+ [(set (match_operand:VF_128 0 register_operand =v)
+ (vec_merge:VF_128
+
On 10/17/2013 07:15 AM, Kirill Yukhin wrote:
+(define_mode_attr ssescalarsize
+ [(V8DI 64) (V4DI 64) (V2DI 64)
+ (V32HI 16) (V16HI 16) (V8HI 16)
+ (V16SI 32) (V8SI 32) (V4SI 32)
+ (V16SF 16) (V8DF 64)])
Error on V16SF. Probably better to fill this out.
+(define_insn
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