RE: [PATCH v2] RISC-V: Refine the condition for add additional vars in RVV cost model

Hi, Juzhe. Thanks for reminding. I did regression again and committed. Regard, Demin From: juzhe.zh...@rivai.ai Sent: 2024年4月29日 13:10 To: Demin Han ; gcc-patches Cc: kito.cheng ; pan2.li ; jeffreyalaw ; Robin Dapp Subject: Re: [PATCH v2] RISC-V: Refine the condition for add additional vars

Re: [PATCH v2] RISC-V: Refine the condition for add additional vars in RVV cost model

Hi, Han. GCC 14 is branch out. You can commit it to trunk (GCC 15). juzhe.zh...@rivai.ai From: demin.han Date: 2024-04-02 16:30 To: gcc-patches CC: juzhe.zhong; kito.cheng; pan2.li; jeffreyalaw; rdapp.gcc Subject: [PATCH v2] RISC-V: Refine the condition for add additional vars in RVV cost

Re: [PATCH v2] RISC-V: Refine the condition for add additional vars in RVV cost model

Thanks for fixing it. LGTM to GCC-15 as Jeff suggested. juzhe.zh...@rivai.ai From: demin.han Date: 2024-04-02 16:30 To: gcc-patches CC: juzhe.zhong; kito.cheng; pan2.li; jeffreyalaw; rdapp.gcc Subject: [PATCH v2] RISC-V: Refine the condition for add additional vars in RVV cost model The

[PATCH v2] RISC-V: Refine the condition for add additional vars in RVV cost model

The adjacent_dr_p is sufficient and unnecessary condition for contiguous access. So unnecessary live-ranges are added and result in smaller LMUL. This patch uses MEMORY_ACCESS_TYPE as condition and constrains segment load/store. Tested on RV64 and no regression. PR target/114506