On Mon, Feb 07, 2022 at 01:54:00PM +0800, Kewen.Lin wrote:
> on 2022/1/28 上午1:17, Segher Boessenkool wrote:
> > On Thu, Jan 27, 2022 at 07:21:33PM +0800, Kewen.Lin wrote:
> >>PR target/103627
> >>* config/rs6000/rs6000.cc (rs6000_option_override_internal): Disable
> >>MMA if
on 2022/1/28 上午1:17, Segher Boessenkool wrote:
> Hi!
>
> On Thu, Jan 27, 2022 at 07:21:33PM +0800, Kewen.Lin wrote:
>> PR target/103627
>> * config/rs6000/rs6000.cc (rs6000_option_override_internal): Disable
>> MMA if !TARGET_VSX.
>>
>> gcc/testsuite/ChangeLog:
>>
>> PR
Hi!
On Thu, Jan 27, 2022 at 07:21:33PM +0800, Kewen.Lin wrote:
> PR target/103627
> * config/rs6000/rs6000.cc (rs6000_option_override_internal): Disable
> MMA if !TARGET_VSX.
>
> gcc/testsuite/ChangeLog:
>
> PR target/103627
> * gcc.target/powerpc/pr103627-1.c: New
Hi,
As PR103627 shows, there is an unexpected case where !TARGET_VSX
and TARGET_MMA co-exist. As ISA3.1 claims, SIMD is a requirement
for MMA. By looking into the ICE, I noticed that the current
MMA implementation depends on vector pairs load/store which use
VSX register, but we don't have a
