On Sun, Jul 14, 2024 at 4:05 AM Takayuki 'January June' Suwa
<jjsuwa_sys3...@yahoo.co.jp> wrote:
>
> They were once mistakenly removed with
> "xtensa: Remove old broken tweak for leaf function", but caused unwanted
> register spills.
>
> gcc/ChangeLog:
>
>         * config/xtensa/xtensa.h (LEAF_REGISTERS, LEAF_REG_REMAP):
>         Withdraw the removal.
>         * config/xtensa/xtensa.cc (xtensa_leaf_regs): Ditto.
> ---
>   gcc/config/xtensa/xtensa.cc | 11 +++++++++++
>   gcc/config/xtensa/xtensa.h  | 12 ++++++++++++
>   2 files changed, 23 insertions(+)

with this change I get the following regressions on little-endian call0
configuration:

+FAIL: gcc.c-torture/compile/20071102-1.c   -O3 -g  (internal compiler
error: in loc_cmp, at var-tracking.cc:3462)
+FAIL: gcc.c-torture/compile/20071102-1.c   -O3 -g  (test for excess errors)
+FAIL: gcc.c-torture/compile/simd-2.c   -O3 -g  (internal compiler
error: in loc_cmp, at var-tracking.cc:3462)
+FAIL: gcc.c-torture/compile/simd-2.c   -O3 -g  (test for excess errors)

their backtraces look like this:

during RTL pass: vartrack
/home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/testsuite/gcc.c-torture/compile/20071102-1.c:
In function 'g':
/home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/testsuite/gcc.c-torture/compile/20071102-1.c:32:1:
internal compiler error: in loc_cmp, at var-tracking.cc:3462
0x1b19d1e internal_error(char const*, ...)
       /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/diagnostic-global-context.cc:491
0x845156 fancy_abort(char const*, int, char const*)
       /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/diagnostic.cc:1725
0x77ea22 loc_cmp
       /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/var-tracking.cc:3462
0x129cfc4 canonicalize_loc_order_check(variable**, dataflow_set*)
       /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/var-tracking.cc:3640
0x12ad319 void hash_table<variable_hasher, false,
xcallocator>::traverse_noresize<dataflow_set*,
&(canonicalize_loc_order_check(variable**,
dataflow_set*))>(dataflow_set*)
       /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/hash-table.h:1173
0x12ad319 void hash_table<variable_hasher, false,
xcallocator>::traverse<dataflow_set*,
&(canonicalize_loc_order_check(variable**,
dataflow_set*))>(dataflow_set*)
       /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/hash-table.h:1194
0x12ac844 compute_bb_dataflow
       /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/var-tracking.cc:7041
0x12ac844 vt_find_locations
       /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/var-tracking.cc:7185
0x12ac9cb variable_tracking_main_1
       /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/var-tracking.cc:10525
0x12acb5b variable_tracking_main()
       /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/var-tracking.cc:10571
0x12acb5b execute
       /home/jcmvbkbc/ws/tensilica/gcc/gcc/gcc/var-tracking.cc:10608


> diff --git a/gcc/config/xtensa/xtensa.cc b/gcc/config/xtensa/xtensa.cc
> index d49d224466a..099213f0994 100644
> --- a/gcc/config/xtensa/xtensa.cc
> +++ b/gcc/config/xtensa/xtensa.cc
> @@ -113,6 +113,17 @@ struct GTY(()) machine_function
>     hash_map<rtx, int> *litpool_usage;
>   };
>
> +/* Vector, indexed by hard register number, which contains 1 for a
> +   register that is allowable in a candidate for leaf function
> +   treatment.  */
> +const char xtensa_leaf_regs[FIRST_PSEUDO_REGISTER] =
> +{
> +  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
> +  1, 1, 1,
> +  1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,
> +  1
> +};
> +
>   static void xtensa_option_override (void);
>   static enum internal_test map_test_to_internal_test (enum rtx_code);
>   static rtx gen_int_relational (enum rtx_code, rtx, rtx);
> diff --git a/gcc/config/xtensa/xtensa.h b/gcc/config/xtensa/xtensa.h
> index 86802343152..3bff973fd88 100644
> --- a/gcc/config/xtensa/xtensa.h
> +++ b/gcc/config/xtensa/xtensa.h
> @@ -253,6 +253,18 @@ along with GCC; see the file COPYING3.  If not see
>   }
>   #define ADJUST_REG_ALLOC_ORDER xtensa_adjust_reg_alloc_order ()
>
> +/* For Xtensa, the only point of this is to prevent GCC from otherwise
> +   giving preference to call-used registers.  To minimize window
> +   overflows for the AR registers, we want to give preference to the
> +   lower-numbered AR registers.  For other register files, which are
> +   not windowed, we still prefer call-used registers, if there are any.  */
> +extern const char xtensa_leaf_regs[FIRST_PSEUDO_REGISTER];
> +#define LEAF_REGISTERS xtensa_leaf_regs
> +
> +/* For Xtensa, no remapping is necessary, but this macro must be
> +   defined if LEAF_REGISTERS is defined.  */
> +#define LEAF_REG_REMAP(REGNO) ((int) (REGNO))
> +
>   /* Internal macros to classify a register number.  */
>
>   /* 16 address registers + fake registers */
> --
> 2.39.2



-- 
Thanks.
-- Max

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