On Tue, 05 Sep 2023 20:07:16 PDT (-0700), gcc-patches@gcc.gnu.org wrote:
On 9/5/23 20:33, Tsukasa OI wrote:
Internally we have this as:
(TARGET_ZICOND || TARGET_XVENTANACONDOPS)
I don't really care, so I'm happy to go with yours.
Because XVentanaCondOps instructions are only available o
On 9/5/23 20:33, Tsukasa OI wrote:
Internally we have this as:
(TARGET_ZICOND || TARGET_XVENTANACONDOPS)
I don't really care, so I'm happy to go with yours.
Because XVentanaCondOps instructions are only available on 64-bit target
(I wanted to prevent misuses because we don't reject XVenta
On 2023/09/06 9:17, Jeff Law wrote:
>
>
> On 9/5/23 06:10, Tsukasa OI wrote:
>> From: Tsukasa OI
>>
>> 'XVentanaCondOps' is a vendor extension from Ventana Micro Systems
>> containing two instructions for conditional move and will be supported on
>> their Veyron V1 CPU.
>>
>> And most notably (f
On 9/5/23 06:10, Tsukasa OI wrote:
From: Tsukasa OI
'XVentanaCondOps' is a vendor extension from Ventana Micro Systems
containing two instructions for conditional move and will be supported on
their Veyron V1 CPU.
And most notably (for historical reasons), 'XVentanaCondOps' and the
standard
From: Tsukasa OI
'XVentanaCondOps' is a vendor extension from Ventana Micro Systems
containing two instructions for conditional move and will be supported on
their Veyron V1 CPU.
And most notably (for historical reasons), 'XVentanaCondOps' and the
standard 'Zicond' extension are functionally equ
