Re: [PATCH v5 1/1] [ARM] Add support for TLS register based stack protector canary access

2022-01-20 Thread Ard Biesheuvel via Gcc-patches
Of Ard > > > Biesheuvel via Gcc-patches > > > Sent: Monday, November 15, 2021 6:04 PM > > > To: linux-harden...@vger.kernel.org > > > Cc: Richard Sandiford ; > > > thomas.preudho...@celest.fr; Keith Packard ; > > > gcc-patches@gcc.gnu.org; Kyry

Re: [PATCH v5 1/1] [ARM] Add support for TLS register based stack protector canary access

2022-01-19 Thread Ard Biesheuvel via Gcc-patches
> > To: linux-harden...@vger.kernel.org > > Cc: Richard Sandiford ; > > thomas.preudho...@celest.fr; Keith Packard ; > > gcc-patches@gcc.gnu.org; Kyrylo Tkachov ; Ard > > Biesheuvel > > Subject: [PATCH v5 1/1] [ARM] Add support for TLS register based stack >

RE: [PATCH v5 1/1] [ARM] Add support for TLS register based stack protector canary access

2022-01-19 Thread Kyrylo Tkachov via Gcc-patches
udho...@celest.fr; Keith Packard ; > gcc-patches@gcc.gnu.org; Kyrylo Tkachov ; Ard > Biesheuvel > Subject: [PATCH v5 1/1] [ARM] Add support for TLS register based stack > protector canary access > > Add support for accessing the stack canary value via the TLS register, > so that

Re: [PATCH v5 1/1] [ARM] Add support for TLS register based stack protector canary access

2022-01-14 Thread Ard Biesheuvel via Gcc-patches
(+ Richard Earnshaw) On Wed, 12 Jan 2022 at 19:29, Ard Biesheuvel wrote: > > On Wed, 17 Nov 2021 at 18:12, Ard Biesheuvel wrote: > > > > (+ Ramana) > > > > Ping? > > > On Mon, 15 Nov 2021 at 19:04, Ard Biesheuvel wrote: > > > > > > Add support for accessing the stack canary value via the TLS

Re: [PATCH v5 1/1] [ARM] Add support for TLS register based stack protector canary access

2022-01-12 Thread Ard Biesheuvel via Gcc-patches
On Wed, 17 Nov 2021 at 18:12, Ard Biesheuvel wrote: > > (+ Ramana) > Ping? > On Mon, 15 Nov 2021 at 19:04, Ard Biesheuvel wrote: > > > > Add support for accessing the stack canary value via the TLS register, > > so that multiple threads running in the same address space can use > > distinct

Re: [PATCH v5 1/1] [ARM] Add support for TLS register based stack protector canary access

2021-11-17 Thread Ard Biesheuvel via Gcc-patches
(+ Ramana) On Mon, 15 Nov 2021 at 19:04, Ard Biesheuvel wrote: > > Add support for accessing the stack canary value via the TLS register, > so that multiple threads running in the same address space can use > distinct canary values. This is intended for the Linux kernel running in > SMP mode,

[PATCH v5 1/1] [ARM] Add support for TLS register based stack protector canary access

2021-11-15 Thread Ard Biesheuvel via Gcc-patches
Add support for accessing the stack canary value via the TLS register, so that multiple threads running in the same address space can use distinct canary values. This is intended for the Linux kernel running in SMP mode, where processes entering the kernel are essentially threads running the same