Re: [PR target/25111] New patterns for m68k bit insns

On 06/20/2017 04:28 AM, Andreas Schwab wrote: > Tested on m68k, installed on trunk and gcc-7 branch. > > Andreas. > > PR target/80970 > * config/m68k/m68k.md (bsetdreg, bchgdreg, bclrdreg): Use "=d" > instead of "+d". Thanks for taking care of this. I've been buried in the

Re: [PR target/25111] New patterns for m68k bit insns

Tested on m68k, installed on trunk and gcc-7 branch. Andreas. PR target/80970 * config/m68k/m68k.md (bsetdreg, bchgdreg, bclrdreg): Use "=d" instead of "+d". Index: config/m68k/m68k.md === ---

Re: [PR target/25111] New patterns for m68k bit insns

On Nov 19 2016, Jeff Law wrote: > diff --git a/gcc/config/m68k/m68k.md b/gcc/config/m68k/m68k.md > index 7b7f373..2085619 100644 > --- a/gcc/config/m68k/m68k.md > +++ b/gcc/config/m68k/m68k.md > @@ -5336,6 +5336,45 @@ > } >[(set_attr "type" "bitrw")]) > > +(define_insn

[PR target/25111] New patterns for m68k bit insns

This BZ is a request to improve the code we generate for single bit set/clear/flip on the m68k where the target bit varies *and* is properly masked to avoid undefined behavior. I wasn't able to trigger this in GCC or newlib's runtime, but in the past Kazu was looking at real embedded code,