Re: [RFC] Slightly fix up vgather* patterns

2011-10-10 Thread Richard Henderson
On 10/08/2011 08:43 AM, Jakub Jelinek wrote: > (define_expand "avx2_gathersi" > - [(set (match_operand:VEC_GATHER_MODE 0 "register_operand" "") > - (unspec:VEC_GATHER_MODE > - [(match_operand:VEC_GATHER_MODE 1 "register_operand" "") > -(match_operand: 2 "memory_operand" "") > -

Re: [RFC] Slightly fix up vgather* patterns

2011-10-10 Thread Jakub Jelinek
On Sun, Oct 09, 2011 at 12:55:40PM +0200, Uros Bizjak wrote: > About memory - can't we use (mem:BLK (match_operand:P > "register_operand" "r")) here? I don't think it is sufficient. Consider e.g. _mm_i32gather_pd (NULL, index, 1); where index is initialized from loading consecutive (32-bit) double

Re: [RFC] Slightly fix up vgather* patterns

2011-10-09 Thread Uros Bizjak
On Sat, Oct 8, 2011 at 5:43 PM, Jakub Jelinek wrote: > The AVX2 docs say that the insns will #UD if any of the mask, src and index > registers are the same, but e.g. on > #include > > __m256 m; > float f[1024]; > > __m256 > foo (void) > { >  __m256i mi = (__m256i) m; >  return _mm256_mask_i32gat

[RFC] Slightly fix up vgather* patterns

2011-10-08 Thread Jakub Jelinek
Hi! The AVX2 docs say that the insns will #UD if any of the mask, src and index registers are the same, but e.g. on #include __m256 m; float f[1024]; __m256 foo (void) { __m256i mi = (__m256i) m; return _mm256_mask_i32gather_ps (m, f, mi, m, 4); } which is IMHO valid and should for m being