Ping?
On Sat, 26 Jul 2014, Marc Glisse wrote:
Hello,
any comment on this patch?
https://gcc.gnu.org/ml/gcc-patches/2014-06/msg00769.html
On Tue, 10 Jun 2014, Marc Glisse wrote:
On Tue, 19 Mar 2013, Richard Henderson wrote:
I'm not fond of this, primarily because I believe the pattern
Hello,
any comment on this patch?
https://gcc.gnu.org/ml/gcc-patches/2014-06/msg00769.html
On Tue, 10 Jun 2014, Marc Glisse wrote:
On Tue, 19 Mar 2013, Richard Henderson wrote:
I'm not fond of this, primarily because I believe the pattern should
not exist at all.
One year later, new try.
On Tue, 19 Mar 2013, Richard Henderson wrote:
I'm not fond of this, primarily because I believe the pattern should
not exist at all.
One year later, new try. Tweaking the pattern, I ended up with a copy of
the mov pattern (the subreg is generated automatically when the modes
don't match),
On Wed, Mar 20, 2013 at 4:54 PM, Marc Glisse marc.gli...@inria.fr wrote:
On Wed, 20 Mar 2013, Richard Biener wrote:
On Wed, Mar 20, 2013 at 4:29 PM, Marc Glisse marc.gli...@inria.fr wrote:
On Wed, 20 Mar 2013, Richard Henderson wrote:
On 03/20/2013 08:00 AM, Marc Glisse wrote:
Do you at
On Tue, 19 Mar 2013, Richard Henderson wrote:
On 03/19/2013 08:47 AM, Marc Glisse wrote:
(define_insn_and_split avx_castmodeavxsizesuffix_castmode
[(set (match_operand:AVX256MODE2P 0 nonimmediate_operand =x,m)
- (unspec:AVX256MODE2P
- [(match_operand:ssehalfvecmode 1
On 03/20/2013 08:00 AM, Marc Glisse wrote:
Do you at least agree that vector-vector subregs make sense, or is that part
wrong as well?
You mean a V4SImode subreg of a V8SImode register, not just same-size casting?
It makes logical sense, but I'm fairly sure you'll need a lot more surgery
On Wed, Mar 20, 2013 at 4:13 PM, Richard Henderson r...@redhat.com wrote:
On 03/20/2013 08:00 AM, Marc Glisse wrote:
Do you at least agree that vector-vector subregs make sense, or is that part
wrong as well?
You mean a V4SImode subreg of a V8SImode register, not just same-size casting?
It
On Wed, 20 Mar 2013, Richard Henderson wrote:
On 03/20/2013 08:00 AM, Marc Glisse wrote:
Do you at least agree that vector-vector subregs make sense, or is that part
wrong as well?
You mean a V4SImode subreg of a V8SImode register, not just same-size casting?
I am mostly interested in the
On Wed, Mar 20, 2013 at 4:29 PM, Marc Glisse marc.gli...@inria.fr wrote:
On Wed, 20 Mar 2013, Richard Henderson wrote:
On 03/20/2013 08:00 AM, Marc Glisse wrote:
Do you at least agree that vector-vector subregs make sense, or is that
part
wrong as well?
You mean a V4SImode subreg of a
On Wed, 20 Mar 2013, Richard Biener wrote:
On Wed, Mar 20, 2013 at 4:29 PM, Marc Glisse marc.gli...@inria.fr wrote:
On Wed, 20 Mar 2013, Richard Henderson wrote:
On 03/20/2013 08:00 AM, Marc Glisse wrote:
Do you at least agree that vector-vector subregs make sense, or is that
part
wrong as
Hello,
the following patch passes bootstrap+testsuite on x86_64-linux-gnu. I
don't see any particular reason to forbid vector subregs of vectors, since
we can already do it through a scalar. And not using unspecs helps avoid
unnecessary copies.
2013-01-03 Marc Glisse marc.gli...@inria.fr
On 03/19/2013 08:47 AM, Marc Glisse wrote:
(define_insn_and_split avx_castmodeavxsizesuffix_castmode
[(set (match_operand:AVX256MODE2P 0 nonimmediate_operand =x,m)
- (unspec:AVX256MODE2P
- [(match_operand:ssehalfvecmode 1 nonimmediate_operand xm,x)]
- UNSPEC_CAST))]
+
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