On Wednesday 24 January 2018 06:29 PM, Siddhesh Poyarekar wrote:
>>> + /* Avoid register indexing for 128-bit stores when the
>>> + AARCH64_EXTRA_TUNE_SLOW_REGOFFSET_QUADWORD_STORE option is set. */
>>> + if (!optimize_size
>>> + && type == ADDR_QUERY_STR
>>> + &&
On Wednesday 24 January 2018 05:50 PM, Kyrill Tkachov wrote:
> I would tend towards making the costs usage more intelligent and
> differentiating
> between loads and stores but I agree that is definitely GCC 9 material.
> Whether this approach is an acceptable stopgap for GCC 8 is up to the
>
Hi Siddhesh,
On 23/01/18 15:41, Siddhesh Poyarekar wrote:
Hi,
Here's v2 of the patch to disable register offset addressing mode for
stores of 128-bit values on Falkor because they're very costly.
Differences from the last version:
- Incorporated changes Jim made to his patch earlier that I
Hi,
Here's v2 of the patch to disable register offset addressing mode for
stores of 128-bit values on Falkor because they're very costly.
Differences from the last version:
- Incorporated changes Jim made to his patch earlier that I missed,
i.e. adding an extra tuning parameter called
