[committed] amdgcn: update target-supports.exp

[Andrew Stubbs]

Recent patches have enabled new capabilities on AMD GCN, but not all the 
testsuite features were enabled. The hardfp divide patch actually had an 
test regression because the expected results were too conservative.

This patch corrects both issues.
Andrewamdgcn: update target-supports.exp

The backend can now vectorize more things.

gcc/testsuite/ChangeLog:

        * lib/target-supports.exp
        (check_effective_target_vect_call_copysignf): Add amdgcn.
        (check_effective_target_vect_call_sqrtf): Add amdgcn.
        (check_effective_target_vect_call_ceilf): Add amdgcn.
        (check_effective_target_vect_call_floor): Add amdgcn.
        (check_effective_target_vect_logical_reduc): Add amdgcn.

diff --git a/gcc/testsuite/lib/target-supports.exp 
b/gcc/testsuite/lib/target-supports.exp
index ad68af51f91..868e2c4f092 100644
--- a/gcc/testsuite/lib/target-supports.exp
+++ b/gcc/testsuite/lib/target-supports.exp
@@ -8555,7 +8555,8 @@ proc check_effective_target_vect_call_copysignf { } {
     return [check_cached_effective_target_indexed vect_call_copysignf {
       expr { [istarget i?86-*-*] || [istarget x86_64-*-*]
             || [istarget powerpc*-*-*]
-            || [istarget aarch64*-*-*] }}]
+            || [istarget aarch64*-*-*]
+             || [istarget amdgcn-*-*] }}]
 }
 
 # Return 1 if the target supports hardware square root instructions.
@@ -8591,7 +8592,8 @@ proc check_effective_target_vect_call_sqrtf { } {
             || [istarget i?86-*-*] || [istarget x86_64-*-*]
             || ([istarget powerpc*-*-*] && [check_vsx_hw_available])
             || ([istarget s390*-*-*]
-                && [check_effective_target_s390_vx]) }}]
+                && [check_effective_target_s390_vx])
+             || [istarget amdgcn-*-*] }}]
 }
 
 # Return 1 if the target supports vector lrint calls.
@@ -8636,14 +8638,16 @@ proc check_effective_target_vect_call_ceil { } {
 
 proc check_effective_target_vect_call_ceilf { } {
     return [check_cached_effective_target_indexed vect_call_ceilf {
-      expr { [istarget aarch64*-*-*] }}]
+      expr { [istarget aarch64*-*-*]
+            || [istarget amdgcn-*-*] }}]
 }
 
 # Return 1 if the target supports vector floor calls.
 
 proc check_effective_target_vect_call_floor { } {
     return [check_cached_effective_target_indexed vect_call_floor {
-      expr { [istarget aarch64*-*-*] }}]
+      expr { [istarget aarch64*-*-*]
+            || [istarget amdgcn-*-*] }}]
 }
 
 # Return 1 if the target supports vector floorf calls.
@@ -8699,7 +8703,8 @@ proc check_effective_target_vect_call_roundf { } {
 # Return 1 if the target supports AND, OR and XOR reduction.
 
 proc check_effective_target_vect_logical_reduc { } {
-    return [check_effective_target_aarch64_sve]
+    return [expr { [check_effective_target_aarch64_sve]
+                  || [istarget amdgcn-*-*] }]
 }
 
 # Return 1 if the target supports the fold_extract_last optab.