Hi!
On Tue, Jul 25, 2017 at 04:10:19PM +0100, Richard Sandiford wrote:
> Segher Boessenkool writes:
> --- gcc/config/rs6000/rs6000.c2017-07-13 09:25:13.909213921 +0100
> +++ gcc/config/rs6000/rs6000.c2017-07-25 11:14:27.692739547 +0100
> @@ -10503,17 +10503,28 @@ rs6000_const_vec
Segher Boessenkool writes:
> Hi Richard,
>
> On Wed, Jul 12, 2017 at 05:33:42PM +0100, Richard Sandiford wrote:
>> The little-endian VSX code uses rotates to swap the two 64-bit halves of
>> 128-bit scalar modes. This is fine for TImode and V1TImode, but it
>> isn't really valid to use RTL rotate
Hi Richard,
On Wed, Jul 12, 2017 at 05:33:42PM +0100, Richard Sandiford wrote:
> The little-endian VSX code uses rotates to swap the two 64-bit halves of
> 128-bit scalar modes. This is fine for TImode and V1TImode, but it
> isn't really valid to use RTL rotates on floating-point modes like
> KFm
The little-endian VSX code uses rotates to swap the two 64-bit halves of
128-bit scalar modes. This is fine for TImode and V1TImode, but it
isn't really valid to use RTL rotates on floating-point modes like
KFmode and TFmode, and doing that triggered an assert added by the
SVE series. This patch
