ARM 64-bit shift ICE

2011-09-19 Thread Paul Brook
The patch below fixes gcc.c-torture/execute/builtin-bitops-1.c on ARM/Thumb-2 targets. The story here is that ARM doesn't have a 64-bit shift operator, so these get decomposed into something like: low1 = (low n) low1 |= (high (32 - n)) /**/ low2 = high (32 - n) low_result = (n 32) ? low2 :

Re: ARM 64-bit shift ICE

2011-09-19 Thread Andrew Stubbs
On 19/09/11 10:12, Paul Brook wrote: In Thumb-2 mode we try and match an M constraint (const_int between 0 and 31) with no other alternatives. This fails, and with nowhere else to go we ICE. The fix is to restrict the predicate for these insns to only accept valid const_int shift counts. This