On Mon, Aug 7, 2017 at 1:36 PM, Michael Collison
wrote:
> This patch improves code generation for shifts with subtract instructions
> where the first operand to the subtract is equal to the bit-size of the
> operation.
>
>
> long f1(long x, int i)
> {
> return x >> (64 - i);
> }
>
> int f2(int
> This patch improves code generation for shifts with subtract
> instructions where the first operand to the subtract is equal to the
> bit-size of the operation.
I would suspect that this will work on lots of targets. Is doing it
in combine an option?
> That is simplify:
> (SHIFT A (32 - B)) -> (SHIFT A (AND (NEG B) 31))
> etc.
I think you need SHIFT_COUNT_TRUNCATED to be true for this to be
valid, but this is exactly what I was getting at in my last message.
, 2017 2:02 PM
To: pins...@gmail.com
Cc: gcc-patches@gcc.gnu.org; Michael Collison ; nd
Subject: Re: [PATCH] [Aarch64] Optimize subtract in shift counts
> That is simplify:
> (SHIFT A (32 - B)) -> (SHIFT A (AND (NEG B) 31)) etc.
I think you need SHIFT_COUNT_TRUNCATED to be true for t
> On Aarc64 SHIFT_COUNT_TRUNCATED is only true if SIMD code generation
> is disabled. This is because the simd instructions can be used for
> shifting but they do not truncate the shift count.
In that case, the change isn't safe! Consider if the value was
negative, for example. Yes, it's technic
-patches@gcc.gnu.org; nd ; pins...@gmail.com
Subject: RE: [PATCH] [Aarch64] Optimize subtract in shift counts
> On Aarc64 SHIFT_COUNT_TRUNCATED is only true if SIMD code generation
> is disabled. This is because the simd instructions can be used for
> shifting but they do not truncate the sh
Richard Kenner wrote:
>Michael Collison wrote:
> > On Aarc64 SHIFT_COUNT_TRUNCATED is only true if SIMD code generation
> > is disabled. This is because the simd instructions can be used for
> > shifting but they do not truncate the shift count.
>
> In that case, the change isn't safe! Consider if
> The pattern will only be matched if the value is positive. More
> specifically if the constant value is 32 (SImode) or 64 (DImode).
I don't mean the constant, but the value subtracted from it.
If that's negative, then we have a shift count larger than the
wordsize.
pins...@gmail.com
Subject: RE: [PATCH] [Aarch64] Optimize subtract in shift counts
> The pattern will only be matched if the value is positive. More
> specifically if the constant value is 32 (SImode) or 64 (DImode).
I don't mean the constant, but the value subtracted from it.
If that
> This case is covered by Wilco's previous reply:
>
> https://gcc.gnu.org/ml/gcc-patches/2017-08/msg00575.html
Which I don't understand:
> No it's perfectly safe - it becomes an integer-only shift after the
> split since it keeps the masking as part of the pattern.
Let say we have your first ex
.ultra.nyu.edu]
Sent: Tuesday, August 8, 2017 12:52 PM
To: Michael Collison
Cc: gcc-patches@gcc.gnu.org; nd ; pins...@gmail.com
Subject: RE: [PATCH] [Aarch64] Optimize subtract in shift counts
> This case is covered by Wilco's previous reply:
>
> https://gcc.gnu.org/ml/gcc-patches/2017-08
> Because for integer shift instructions the shift count is
> truncated. We ensure that we only use integer shift instructions by
> emitting a shift with a mask. This only matches integer shift
> instructions in the md file.
That's why I asked about SHIFT_COUNT_TRUNCATED. So it's truncated for
so
: Michael Collison
Cc: gcc-patches@gcc.gnu.org; nd ; pins...@gmail.com
Subject: RE: [PATCH] [Aarch64] Optimize subtract in shift counts
> Because for integer shift instructions the shift count is truncated.
> We ensure that we only use integer shift instructions by emitting a
> shift with a m
> Correct. It is truncated for integer shift, but not simd shift
> instructions. We generate a pattern in the split that only generates
> the integer shift instructions.
That's unfortunate, because it would be nice to do this in simplify_rtx,
since it's machine-independent, but that has to be cond
Correct.
-Original Message-
From: Richard Kenner [mailto:ken...@vlsi1.ultra.nyu.edu]
Sent: Tuesday, August 8, 2017 1:20 PM
To: Michael Collison
Cc: gcc-patches@gcc.gnu.org; nd ; pins...@gmail.com
Subject: RE: [PATCH] [Aarch64] Optimize subtract in shift counts
> Correct. It
On Tue, Aug 8, 2017 at 10:20 PM, Richard Kenner
wrote:
>> Correct. It is truncated for integer shift, but not simd shift
>> instructions. We generate a pattern in the split that only generates
>> the integer shift instructions.
>
> That's unfortunate, because it would be nice to do this in simplif
, August 14, 2017 1:27 AM
To: Richard Kenner
Cc: Michael Collison ; GCC Patches
; nd ; Andrew Pinski
Subject: Re: [PATCH] [Aarch64] Optimize subtract in shift counts
On Tue, Aug 8, 2017 at 10:20 PM, Richard Kenner
wrote:
>> Correct. It is truncated for integer shift, but not simd
Richard Biener writes:
> On Tue, Aug 8, 2017 at 10:20 PM, Richard Kenner
> wrote:
>>> Correct. It is truncated for integer shift, but not simd shift
>>> instructions. We generate a pattern in the split that only generates
>>> the integer shift instructions.
>>
>> That's unfortunate, because it wo
On August 21, 2017 7:46:09 PM GMT+02:00, Richard Sandiford
wrote:
>Richard Biener writes:
>> On Tue, Aug 8, 2017 at 10:20 PM, Richard Kenner
>> wrote:
Correct. It is truncated for integer shift, but not simd shift
instructions. We generate a pattern in the split that only
>generates
>
Richard Biener writes:
> On August 21, 2017 7:46:09 PM GMT+02:00, Richard Sandiford
> wrote:
>>Richard Biener writes:
>>> On Tue, Aug 8, 2017 at 10:20 PM, Richard Kenner
>>> wrote:
> Correct. It is truncated for integer shift, but not simd shift
> instructions. We generate a pattern in
On Tue, Aug 22, 2017 at 9:29 AM, Richard Sandiford
wrote:
> Richard Biener writes:
>> On August 21, 2017 7:46:09 PM GMT+02:00, Richard Sandiford
>> wrote:
>>>Richard Biener writes:
On Tue, Aug 8, 2017 at 10:20 PM, Richard Kenner
wrote:
>> Correct. It is truncated for integer shif
Richard Biener writes:
> On Tue, Aug 22, 2017 at 9:29 AM, Richard Sandiford
> wrote:
>> Richard Biener writes:
>>> On August 21, 2017 7:46:09 PM GMT+02:00, Richard Sandiford
>>> wrote:
Richard Biener writes:
> On Tue, Aug 8, 2017 at 10:20 PM, Richard Kenner
> wrote:
>>> Correc
Hi,
The main reason we have this issue is that DImode can be treated as a
vector of size 1. As a result we do not know whether the shift is an integer
or SIMD instruction. One way around this is to never use the SIMD variant,
another is to introduce V1DImode for vectors of size 1.
Short term I be
chard Biener
Cc: Richard Kenner ; Michael Collison
; GCC Patches ; nd
; Andrew Pinski
Subject: Re: [PATCH] [Aarch64] Optimize subtract in shift counts
Richard Biener writes:
> On Tue, Aug 22, 2017 at 9:29 AM, Richard Sandiford
> wrote:
>> Richard Biener writes:
>>> On Augu
-Original Message-
> From: Richard Sandiford [mailto:richard.sandif...@linaro.org]
> Sent: Tuesday, August 22, 2017 9:11 AM
> To: Richard Biener
> Cc: Richard Kenner ; Michael Collison
> ; GCC Patches ; nd
> ; Andrew Pinski
> Subject: Re: [PATCH] [Aarch64] Optimize subtr
, September 6, 2017 11:32 AM
To: Michael Collison
Cc: Richard Biener ; Richard Kenner
; GCC Patches ; nd
; Andrew Pinski
Subject: Re: [PATCH] [Aarch64] Optimize subtract in shift counts
Michael Collison writes:
> Richard Sandiford do you have any objections to the patch as it stands?
> It d
Original Message-
> From: Richard Sandiford [mailto:richard.sandif...@linaro.org]
> Sent: Wednesday, September 6, 2017 11:32 AM
> To: Michael Collison
> Cc: Richard Biener ; Richard Kenner
> ; GCC Patches ; nd
> ; Andrew Pinski
> Subject: Re: [PATCH] [Aarch64] Optimize sub
gt; nicely-contained piece of work.
>>
>> Thanks,
>> Richard
>>
>>> -Original Message-
>>> From: Richard Sandiford [mailto:richard.sandif...@linaro.org]
>>> Sent: Tuesday, August 22, 2017 9:11 AM
>>> To: Richard Biener
>>&
Richard Sandiford writes:
> Richard Sandiford writes:
>> Michael Collison writes:
>>> Richard,
>>>
>>> The problem with this approach for Aarch64 is that
>>> TARGET_SHIFT_TRUNCATION_MASK is based on SHIFT_COUNT_TRUNCATED which is
>>> normally 0 as it based on the TARGET_SIMD flag.
>>
>> Maybe I'
.
-Original Message-
From: Richard Sandiford [mailto:richard.sandif...@linaro.org]
Sent: Wednesday, September 6, 2017 10:22 AM
To: Michael Collison
Cc: Richard Biener ; Richard Kenner
; GCC Patches ; nd
; Andrew Pinski
Subject: Re: [PATCH] [Aarch64] Optimize subtract in shift counts
Richard
On Fri, Sep 15, 2017 at 09:15:17AM +0100, Michael Collison wrote:
> Patch updated with comments to simplify pattern .from Richard Sandiford. Okay
> for trunk?
OK.
Thanks,
James
>
> 2017-09-14 Michael Collison
>
> * config/aarch64/aarch64.md (*aarch64_reg__minus3):
> New pattern.
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