> -----Original Message-----
> From: Jakub Jelinek <ja...@redhat.com>
> Sent: 24 March 2020 08:20
> To: Richard Earnshaw <richard.earns...@arm.com>; Ramana
> Radhakrishnan <ramana.radhakrish...@arm.com>; Kyrylo Tkachov
> <kyrylo.tkac...@arm.com>
> Cc: gcc-patches@gcc.gnu.org
> Subject: [PATCH] arm: Fix arm {,u}subvdi4 and usubvsi4 expanders [PR94286]
>
> Hi!
>
> The following testcase ICEs, because these expanders will happily create a
> SImode 0x80000000 CONST_INT, which is not valid RTL, as CONST_INTs need
> to be sign extended from the mode precision to full HWI.
>
> Fixed thusly, bootstrapped/regtested on armv7hl-linux-gnueabi, ok for trunk?
Ok.
Thanks,
Kyrill
>
> 2020-03-24 Jakub Jelinek <ja...@redhat.com>
>
> PR target/94286
> * config/arm/arm.md (subvdi4, usubvsi4, usubvdi4): Use
> gen_int_mode
> instead of GEN_INT.
>
> * gcc.dg/pr94286.c: New test.
>
> --- gcc/config/arm/arm.md.jj 2020-03-20 09:32:48.094338574 +0100
> +++ gcc/config/arm/arm.md 2020-03-23 19:23:18.263211430 +0100
> @@ -1481,7 +1481,7 @@ (define_expand "subvdi4"
> lo_op2 = force_reg (SImode, lo_op2);
> if (CONST_INT_P (lo_op2))
> emit_insn (gen_cmpsi2_addneg (lo_result, lo_op1, lo_op2,
> - GEN_INT (-INTVAL (lo_op2))));
> + gen_int_mode (-INTVAL (lo_op2), SImode)));
> else
> emit_insn (gen_subsi3_compare1 (lo_result, lo_op1, lo_op2));
>
> @@ -1525,7 +1525,8 @@ (define_expand "usubvsi4"
> }
> else if (CONST_INT_P (operands[2]))
> emit_insn (gen_cmpsi2_addneg (operands[0], operands[1], operands[2],
> - GEN_INT (-INTVAL (operands[2]))));
> + gen_int_mode (-INTVAL (operands[2]),
> + SImode)));
> else if (CONST_INT_P (operands[1]))
> {
> mode = CC_RSBmode;
> @@ -1597,7 +1598,7 @@ (define_expand "usubvdi4"
> lo_op2 = force_reg (SImode, lo_op2);
> if (CONST_INT_P (lo_op2))
> emit_insn (gen_cmpsi2_addneg (lo_result, lo_op1, lo_op2,
> - GEN_INT (-INTVAL (lo_op2))));
> + gen_int_mode (-INTVAL (lo_op2), SImode)));
> else
> emit_insn (gen_subsi3_compare1 (lo_result, lo_op1, lo_op2));
>
> --- gcc/testsuite/gcc.dg/pr94286.c.jj 2020-03-23 19:24:26.294207928
> +0100
> +++ gcc/testsuite/gcc.dg/pr94286.c 2020-03-23 19:21:32.501771489
> +0100
> @@ -0,0 +1,11 @@
> +/* PR target/94286 */
> +/* { dg-do compile } */
> +/* { dg-options "-O2 -g" } */
> +
> +unsigned a, b;
> +
> +int
> +foo (void)
> +{
> + return __builtin_sub_overflow (a, 0x80000000U, &b); }
>
> Jakub
