On 17 Oct 12:58, Koval, Julia wrote:
> Hi, this is the second patch of enabling GFNI ISASET. It adds GF2P8AFFINEINV
> instruction.
> The instruction is described here:
> https://software.intel.com/sites/default/files/managed/c5/15/architecture-instruction-set-extensions-programming-reference.pdf
>
Hello Julia!
On 30 Oct 19:02, Koval, Julia wrote:
> Hi,
> Fixed that.
Your patch is OK for trunk. I've comitted it w/ minor re-indentation in
gcc/ChangeLog entry.
--
Thanks, K
> > >
> > > Ok for trunk?
> > Few comments:
> > 1. Why copyright in config/i386/gfniintrin.h starts from 2014?
> >
> > 2.
On Mon, Oct 30, 2017 at 07:02:23PM +, Koval, Julia wrote:
> gcc/testsuite/
> * gcc.target/i386/avx-1.c: Handle new intrinsics.
> * gcc.target/i386/avx512-check.h: Check GFNI bit.
> * gcc.target/i386/avx512f-gf2p8affineinvqb-2.c: Runtime test.
> * gcc.target/i386/avx512vl
-
> From: gcc-patches-ow...@gcc.gnu.org [mailto:gcc-patches-
> ow...@gcc.gnu.org] On Behalf Of Jakub Jelinek
> Sent: Tuesday, October 31, 2017 8:28 PM
> To: Koval, Julia
> Cc: Kirill Yukhin ; GCC Patches patc...@gcc.gnu.org>
> Subject: Re: [patch][x86] GFNI enabling [2/4]
&
Koval, Julia
> Sent: Thursday, November 02, 2017 12:57 PM
> To: Jakub Jelinek
> Cc: Kirill Yukhin ; GCC Patches patc...@gcc.gnu.org>
> Subject: RE: [patch][x86] GFNI enabling [2/4]
>
> The documentation is right, I was wrong not adding SSE/AVX flags in these
> builtin declara
,
__builtin_ia32_vgf2p8affineinvqb_v16qi_mask): Move to ARGS array.
> -Original Message-
> From: Koval, Julia
> Sent: Friday, November 03, 2017 9:27 AM
> To: 'Jakub Jelinek'
> Cc: 'Kirill Yukhin' ; 'GCC Patches' patc...@gcc.gnu.org>
> Subject: RE: [patch][x86] GFNI enabling
Hello Julia!
On 03 Nov 17:42, Koval, Julia wrote:
> Here is the solution I propose:
>
> gcc/
> * common/config/i386/i386-common.c
> (OPTION_MASK_ISA_GENERAL_REGS_ONLY_UNSET): Remove MPX from flag.
> (ix86_handle_option): Move MPX to isa_flags2 and GFNI to isa_flags.
> * con
