RFC: ARM 64-bit shifts in NEON

2011-12-02 Thread Andrew Stubbs
Hi All, I'm trying to implement DImode shifts using ARM NEON instructions. This wouldn't be difficult in itself, but making it play nice with the existing implementation is causing me problems. I'd like a few suggestions/pointers/comments to help me get this right, please. The existing shift

Re: RFC: ARM 64-bit shifts in NEON

2011-12-07 Thread Richard Earnshaw
On 02/12/11 12:42, Andrew Stubbs wrote: > Hi All, > > I'm trying to implement DImode shifts using ARM NEON instructions. This > wouldn't be difficult in itself, but making it play nice with the > existing implementation is causing me problems. I'd like a few > suggestions/pointers/comments to h

Re: RFC: ARM 64-bit shifts in NEON

2011-12-07 Thread Andrew Stubbs
On Wed 07 Dec 2011 13:42:37 GMT, Richard Earnshaw wrote: So it looks like the code generated for core registers with thumb2 is pretty rubbish (no real surprise there -- to get the best code you need to make use of the fact that on ARM a shift by a small negative number (< -128) will give zero.

Re: RFC: ARM 64-bit shifts in NEON

2011-12-07 Thread Richard Earnshaw
On 07/12/11 14:03, Andrew Stubbs wrote: > On Wed 07 Dec 2011 13:42:37 GMT, Richard Earnshaw wrote: >> So it looks like the code generated for core registers with thumb2 is >> pretty rubbish (no real surprise there -- to get the best code you need >> to make use of the fact that on ARM a shift by a

Re: RFC: ARM 64-bit shifts in NEON

2011-12-07 Thread Andrew Stubbs
On Wed 07 Dec 2011 14:20:43 GMT, Richard Earnshaw wrote: Would it not require an unspec to prevent 'clever things' happening to the negative shift, if we were to encode these in the machine description? I'm not too clear on what these 'clever things' might be in the case of shift-by-register (pre

Re: RFC: ARM 64-bit shifts in NEON

2011-12-12 Thread Andrew Stubbs
On 07/12/11 13:42, Richard Earnshaw wrote: So it looks like the code generated for core registers with thumb2 is pretty rubbish (no real surprise there -- to get the best code you need to make use of the fact that on ARM a shift by a small negative number (< -128) will give zero. This gives us

Re: RFC: ARM 64-bit shifts in NEON

2011-12-12 Thread Richard Earnshaw
On 12/12/11 16:28, Andrew Stubbs wrote: > On 07/12/11 13:42, Richard Earnshaw wrote: >> So it looks like the code generated for core registers with thumb2 is >> pretty rubbish (no real surprise there -- to get the best code you need >> to make use of the fact that on ARM a shift by a small negative