Re: [PATCH] RISC-V: Add testcases for VSETVL PASS

2022-12-27 Thread Kito Cheng via Gcc-patches
It should be same issue as https://github.com/gcc-mirror/gcc/commit/d0bbecb1c418b680505faa998fe420f0fd4bbfc1, I gonna commit a fix for that. On Tue, Dec 27, 2022 at 11:04 PM Jeff Law via Gcc-patches wrote: > > > > On 12/26/22 02:20, Andreas Schwab wrote: > > FAIL:

Re: [PATCH] RISC-V: Add testcases for VSETVL PASS

2022-12-27 Thread Jeff Law via Gcc-patches
On 12/26/22 02:20, Andreas Schwab wrote: FAIL: gcc.target/riscv/rvv/vsetvl/dump-1.c -O0 (test for excess errors) Excess errors: /usr/include/gnu/stubs.h:8:11: fatal error: gnu/stubs-ilp32.h: No such file or directory compilation terminated. Isn't this really an indicator that the ILP32

Re: Re: [PATCH] RISC-V: Add testcases for VSETVL PASS

2022-12-26 Thread 钟居哲
: Andreas Schwab Date: 2022-12-26 17:20 To: juzhe.zhong CC: gcc-patches; kito.cheng; palmer Subject: Re: [PATCH] RISC-V: Add testcases for VSETVL PASS FAIL: gcc.target/riscv/rvv/vsetvl/dump-1.c -O0 (test for excess errors) Excess errors: /usr/include/gnu/stubs.h:8:11: fatal error: gnu/stubs-ilp32

Re: [PATCH] RISC-V: Add testcases for VSETVL PASS

2022-12-26 Thread Andreas Schwab
FAIL: gcc.target/riscv/rvv/vsetvl/dump-1.c -O0 (test for excess errors) Excess errors: /usr/include/gnu/stubs.h:8:11: fatal error: gnu/stubs-ilp32.h: No such file or directory compilation terminated. -- Andreas Schwab, sch...@linux-m68k.org GPG Key fingerprint = 7578 EB47 D4E5 4D69 2510

Re: [PATCH] RISC-V: Add testcases for VSETVL PASS 4

2022-12-19 Thread Kito Cheng via Gcc-patches
Commited to trunk 於 2022年12月14日 週三 16:20 寫道: > From: Ju-Zhe Zhong > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-1.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_bb_prop-10.c: New test. > *

Re: [PATCH] RISC-V: Add testcases for VSETVL PASS 3

2022-12-19 Thread Kito Cheng via Gcc-patches
Commited to trunk 於 2022年12月14日 週三 16:16 寫道: > From: Ju-Zhe Zhong > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-1.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_miss_default-10.c: New test. > *

Re: [PATCH] RISC-V: Add testcases for VSETVL PASS 5

2022-12-19 Thread Kito Cheng via Gcc-patches
Commited to trunk 於 2022年12月14日 週三 16:27 寫道: > From: Ju-Zhe Zhong > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-1.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_back_prop-10.c: New test. > *

Re: [PATCH] RISC-V: Add testcases for VSETVL PASS 2

2022-12-19 Thread Kito Cheng via Gcc-patches
Commited to trunk 於 2022年12月14日 週三 16:13 寫道: > From: Ju-Zhe Zhong > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-1.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-10.c: New test. > * gcc.target/riscv/rvv/vsetvl/vlmax_phi-11.c: New test.

Re: [PATCH] RISC-V: Add testcases for VSETVL PASS

2022-12-18 Thread Kito Cheng via Gcc-patches
Hi Jeff: > Ah, I should have looked at those regexps closer. Understood about the > checking for hoisting the vsetvl. Though it makes me wonder if we'd be > better off dumping information out of the vsetvl pass. I've discussed adding an extra verify pass and a kind of rating mechnish to

Re: [PATCH] RISC-V: Add testcases for VSETVL PASS

2022-12-16 Thread Jeff Law via Gcc-patches
On 12/16/22 18:31, 钟居哲 wrote: Register allocation (RA) doesn't affect the assembler checks since I relax the registers in assmebler checks, all assmebler checks have their own goal. For example: The code like this: +void foo2 (void * restrict in, void * restrict out, int n) +{ + for (int

Re: Re: [PATCH] RISC-V: Add testcases for VSETVL PASS

2022-12-16 Thread 钟居哲
:07 To: juzhe.zhong; gcc-patches CC: kito.cheng; palmer Subject: Re: [PATCH] RISC-V: Add testcases for VSETVL PASS On 12/14/22 01:09, juzhe.zh...@rivai.ai wrote: > From: Ju-Zhe Zhong > > gcc/testsuite/ChangeLog: > > * gcc.target/riscv/rvv/rvv.exp: Adjust to enable tests

Re: [PATCH] RISC-V: Add testcases for VSETVL PASS

2022-12-16 Thread Jeff Law via Gcc-patches
On 12/14/22 01:09, juzhe.zh...@rivai.ai wrote: From: Ju-Zhe Zhong gcc/testsuite/ChangeLog: * gcc.target/riscv/rvv/rvv.exp: Adjust to enable tests for VSETVL PASS. * gcc.target/riscv/rvv/vsetvl/dump-1.c: New test. *