Lower the partial limbs of extended _BitInts like the full limbs for most
operations, so that explicit extensions can be inserted only where they
are really needed.
gcc/ChangeLog:
* gimple-lower-bitint.cc (struct bitint_large_huge): Remove
the abi_load_p parameter of limb_access.
Ping!
please review.
Thanks & Regards
Jeevitha
On 26/08/25 6:42 pm, jeevitha wrote:
>
> Hi All,
>
> The following patch has been bootstrapped and regtested on powerpc64le-linux.
>
> Previously, vec_slo/vec_sll always default to V4SI, inserting unwanted
> VIEW_CONVERT_EXPR int casts. This caus
On Mon, Sep 8, 2025 at 1:04 PM Ville Voutilainen
wrote:
>
> On Mon, 8 Sept 2025 at 13:54, Richard Biener
> wrote:
> > That said, I see no point in std::observable_checkpoint to be represented
> > in the IL at all if all it is is to cater to FUD around what compilers might
> > think is a correct
This patch allows profiles input in '--with-arch'. With this change,
profile names such as `rva20*` `rva22*`, `rvb23*` can be passed
directly to `--with-arch` without triggering configure errors. This
makes it easier to configure and build a toolchain targeting RISC-V
profiles, since the input
On Mon, Sep 8, 2025 at 10:42 AM Jonathan Wakely wrote:
> On Mon, 8 Sept 2025 at 07:46, Tomasz Kaminski wrote:
> >
> >
> >
> > On Fri, Sep 5, 2025 at 10:57 PM Jonathan Wakely
> wrote:
> >>
> >> C++17 has a 'Requires:' precondition that the two random access iterator
> >> types have the same valu
Ping.
Thanks,
Chris
On 23/06/2025 14:48, Christopher Bazley wrote:
Dear GCC Developers,
I previously received comments from Joseph and Jakub, which I believe
I addressed more than a month ago.
Please could someone review version 4?
Thanks,
Chris
On 21/05/2025 16:13, Christopher Bazley wr
On Mon, Sep 08, 2025 at 08:19:39AM +0200, Matthias Kretz wrote:
> Andrew Pinski [Friday, 5 September 2025, 22:50:30 CEST]:
> > On Fri, Sep 5, 2025 at 4:06 AM Matthias Kretz wrote:
> > > diff --git a/gcc/testsuite/g++.dg/pr121801_float16_cst_mangling.C b/gcc/
> > > testsuite/g++.dg/pr121801_float16
The SLP reduc-index computation is confused by having an outer reduction
inner loop nested cycle fed by another non-reduction nested cycle.
Instead of undoing the unfortunate mixing of outer reduction inner
cycles with general nested cycles the following instead distinguishes
them by not setting ST
Since these are all minor style issues and changes to comments, I'm
happy to make the changes myself before pushing the patch.
But first, does anybody have any comments on my comments? :-)
On Mon, 8 Sept 2025 at 15:57, Jonathan Wakely wrote:
>
> On Tue, 05 Aug 2025 at 09:21 +, 1nfocalypse w
"H.J. Lu" writes:
> On Mon, Sep 8, 2025 at 7:31 AM Sam James wrote:
>>
>> This didn't show up in my inbox for some reason, so sorry for awkward
>> reply:
>>
>> Can you do this? { dg-additional-options "-fPIE" { target pie } }
>>
>
> This test requires no direct access to external symbols from
>
On 9/8/25 4:33 PM, Matthias Kretz wrote:
On 8 September 2025 16:03:21 CEST, Jason Merrill wrote:
On 9/8/25 8:11 AM, Matthias Kretz wrote:
Andrew Pinski [Friday, 5 September 2025, 22:57:02 CEST]:
It seems that Clang and GCC disagree on mangling 80-Bit long double:
https://compiler-explorer.
Some of the tests use { dg-do run } but don't actually do anything,
they just refer to some typedefs. Those should be { dg-do compile }
instead of run.
This is about -fdump-ada-spec not generating the definition of the structure
for pointers to anonymous structure as structure elements.
Tested on x86-64/Linux, applied on the mainline.
2025-09-08 Eric Botcazou
PR ada/121544
* c-ada-spec.cc (dump_ada_node) : Dump the name of
This PR is about spurious failures of the ACATS-4 test cxai033, which uses
tasking. This tentatively applies the same tweak as in other similar cases.
Tested on x86-64/Linux, applied on the mainline.
2025-09-08 Eric Botcazou
PR ada/121532
* ada/acats-4/tests/cxa/cxai033.a:
On Sat, 6 Sep 2025, Alejandro Colomar wrote:
> While this syntax is not standard, there's a certain degree of consensus
> within the C Committee that, if this was ever standardized, there's a
> preference to have a single list of forward declarations of parameters.
I think that's exaggerating con
On Mon, Sep 8, 2025 at 11:44 AM Iain Sandoe wrote:
>
>
>
> > On 8 Sep 2025, at 08:57, Richard Biener wrote:
> >
> > On Sun, Sep 7, 2025 at 9:43 PM Iain Sandoe wrote:
> >>
> >> Thanks for the helpful input from reviewers;
> >>
> >> This version has 4 changes from v1:
> >> 1. removes some unrelate
From: Tsukasa OI
In general, tail call optimization requires that the callee's saved
registers are a superset of the caller's.
The Standard Vector Calling Convention Variant (assembler: .variant_cc)
requires that a function with this calling convention preserves vector
registers v1-v7 and v24-v3
On Fri, 29 Aug 2025 at 15:53, Jonathan Wakely wrote:
>
> On Fri, 29 Aug 2025 at 14:31, Tomasz Kaminski wrote:
> >
> >
> >
> > On Fri, Aug 29, 2025 at 2:06 AM Nathan Myers wrote:
> >>
> >> Changes in v2:
> >> * Make a global function __syncbuf_get_mutex, not an extern template
> >> instantiatio
On Mon, Sep 8, 2025 at 4:36 PM Andrew Pinski
wrote:
>
> On Mon, Sep 8, 2025 at 4:24 PM Kees Cook wrote:
> >
> > On Tue, Sep 09, 2025 at 12:13:19AM +0200, Martin Uecker wrote:
> > > Sorry, example should have been this:
> > >
> > > typedef int arr_t[];
> > > typedef int arr3_t[3];
> > >
> > > void
Hi Joseph,
On Mon, Sep 08, 2025 at 09:21:20PM +, Joseph Myers wrote:
> On Sat, 6 Sep 2025, Alejandro Colomar wrote:
>
> > While this syntax is not standard, there's a certain degree of consensus
> > within the C Committee that, if this was ever standardized, there's a
> > preference to have a
From: Pan Li
The widening-mul will insert a cast for the widen-mul, the
function build_and_insert_cast is design to take care of it.
In some case the optimized gimple has some unnecessary cast,
for example as below code.
#define SAT_U_MUL_FMT_5(NT, WT) \
NT __attribute__((no
On Fri, 2025-09-05 at 08:50 +0800, Lulu Cheng wrote:
>
> 在 2025/9/4 下午7:48, Lulu Cheng 写道:
> >
> > 在 2025/8/22 下午4:14, Xi Ruoyao 写道:
> > > In a CAS operation, even if expected != *memory we still need to
> > > do an
> > > atomic load of *memory into output. But I made a mistake in the
> > > init
Enable those tests so we won't make too stupid mistakes in 16B atomic
implementation anymore.
All these test passed on a Loongson 3C6000/S except
atomic-other-int128.c. With GDB patched to support sc.q
(https://sourceware.org/pipermail/gdb-patches/2025-August/220034.html)
this test also XPASS.
g
Dear all,
this is the second (and hopefully final) patch to fix this PR for good.
This makes the GNU intrinsics STAT/LSTAT/FSTAT almost generic, with few
restrictions:
- for the VALUES argument we will support only kinds 4 and 8.
This allows to stay with the current runtime library functions
On Tue, Sep 09, 2025 at 12:13:19AM +0200, Martin Uecker wrote:
> Sorry, example should have been this:
>
> typedef int arr_t[];
> typedef int arr3_t[3];
>
> void f(arr3_t*);
>
> void g(void (*fp)(arr_t*)) {
>
> int a[3];
> (*fp)(&a); // this call would fail?
> }
>
> int h()
On Mon, 8 Sept 2025 at 21:06, Jonathan Wakely wrote:
>
> On Mon, 8 Sept 2025 at 20:59, François Dumont wrote:
> >
> > This is V2 of this patch. Main diff with initial version is that I
> > restored the copy of functors in C++98.
> >
> > I'm all ears for a new name for the _GLIBCXX_CP_FWDREF macro
From: Pan Li
The widen-mul removed the unnecessary cast, thus adjust the
SAT_MUL of wide-mul to a simpler form.
gcc/ChangeLog:
* match.pd: Remove unnecessary cast of unsigned
SAT_MUL for widen-mul.
Signed-off-by: Pan Li
---
gcc/match.pd | 4 ++--
1 file changed, 2 insertions(
Enable SSE4.1 ceil/floor/trunc for -Os to replace a function call with
roundss or roundsd by dropping !flag_trapping_math.
gcc/
PR target/121861
* config/i386/i386.cc (ix86_optab_supported_p): Drop
!flag_trapping_math check for floor_optab, ceil_optab and
btrunc_op
On Mon, Sep 08, 2025 at 04:36:57PM -0700, Andrew Pinski wrote:
> On Mon, Sep 8, 2025 at 4:24 PM Kees Cook wrote:
> >
> > On Tue, Sep 09, 2025 at 12:13:19AM +0200, Martin Uecker wrote:
> > > Sorry, example should have been this:
> > >
> > > typedef int arr_t[];
> > > typedef int arr3_t[3];
> > >
>
On Mon, Sep 8, 2025 at 7:14 PM Hongtao Liu wrote:
>
> On Tue, Sep 9, 2025 at 4:26 AM H.J. Lu wrote:
> >
> > Enable SSE4.1 ceil/floor/trunc for -Os to replace a function call with
> > roundss or roundsd.
> >
> > gcc/
> >
> > PR target/121861
> > * config/i386/i386.cc (ix86_optab_su
> -Original Message-
> From: H.J. Lu
> Sent: Tuesday, September 9, 2025 11:09 AM
> To: gcc-patches@gcc.gnu.org
> Cc: Liu, Hongtao ; ubiz...@gmail.com
> Subject: [PATCH v2] x86: Enable SSE4.1 ceil/floor/trunc for -Os
>
> Enable SSE4.1 ceil/floor/trunc for -Os to replace a function call
Bootstrapped and regtested on loongarch64-linux-gnu. Ok for trunk?
Changes from v2 to v3:
- Reorder the ICE fix before the semantic fix
- Fix incorrect RTL for the fcc output
Changes from v1 to v2:
- Use { xfail } in { dg-final } instead of { dg-xfail-if }, because it's
the thread simulation
This modifier is intended to output $r0 for (const_int 0), but the
logic:
GET_MODE (op) != TImode || (op != CONST0_RTX (TImode) && code != REG)
will reject (const_int 0) because (const_int 0) actually does not have
a mode and GET_MODE will return VOIDmode for it.
Use reg_or_0_operand instead to
From: Liao Shihua
This Patch implements the Quad-precision Float extension for RISC-V, based on
Kito's work five years ago in
https://github.com/riscvarchive/riscv-gcc/tree/q-ext
Co-authored-by: Kito Chen
gcc/ChangeLog:
* config/riscv/iterators.md (fsd): Add TF mode to ANYF and ANYLS
On Mon, Sep 08, 2025 at 05:40:00PM +0200, Jason Merrill wrote:
> > Also, the question is if we don't use the TYPE_SIZE_UNIT or TYPE_SIZE
> > to determine how many hex digits to print, what else should be used.
> > For decimal floating point, I think we need to keep doing what we used
> > before, th
On Sep 08 2025, Jason Merrill wrote:
> How about MODE_PRECISION (TYPE_MODE (type))?
That's wrong for XFmode on m68k. It has a mode precsion of 80 bits, but
a size of 12 bytes (and the padding bits are in the middle).
--
Andreas Schwab, sch...@linux-m68k.org
GPG Key fingerprint = 7578 EB47 D4E5
* adjusted the test with 'float16' as pointed out
* moved common real_to_target call before the branch
* added assertions for multiple of 32 or exactly 16 bits
* added a comment to the branch
The long double mangling issue should get its own PR & patch.
Tested on x86_64. However, I got a CI fa
On Fri, Sep 05, 2025 at 09:19:29AM -0700, Kees Cook wrote:
> On Fri, Sep 05, 2025 at 10:51:03AM +0200, Peter Zijlstra wrote:
> > On Thu, Sep 04, 2025 at 05:24:10PM -0700, Kees Cook wrote:
> > > +- The check-call instruction sequence must be treated a single unit: it
> > > + cannot be rearranged or
All the new tests fail on 32-bit targets because they don't have
__uint128_t so the philox engines aren't defined.
We should add this to them all:
// { dg-require-cpp-feature-test __cpp_lib_philox_engine }
Respin of
https://gcc.gnu.org/pipermail/gcc-patches/2025-August/691426.html but
separates the middle end vectorizer changes from the RISC-V target
specific changes.
The patch changes the riscv loop codegen from
vsetvli a5,a2,e32,m1,ta,mu
vle32.v v1,0(a1)
sllia4,a5,2
> On 8 Sep 2025, at 15:53, Richard Biener wrote:
>
>
>
>> Am 08.09.2025 um 16:28 schrieb Iain Sandoe :
>>
>>
>>
On 8 Sep 2025, at 15:20, Iain Sandoe wrote:
> On 8 Sep 2025, at 15:05, Jakub Jelinek wrote:
On Mon, Sep 08, 2025 at 02:54:18PM +0100, Ia
hi Iain
> On 8 Sep 2025, at 20:24, Iain Buclaw wrote:
>
> Excerpts from Iain Buclaw's message of September 8, 2025 6:27 pm:
>> Excerpts from Iain Sandoe's message of September 6, 2025 9:27 pm:
>>> Tested on x86_64-darwin21 (has __fork) and x86_64-darwin10 (does not).
>>> OK for trunk?
>>> thanks
I decided to deviate once (described in detail in the commit message).
Without this deviation writing tests is very clumsy and sometimes not
possible, e.g. when mixing uint8_t and dynamic padding values to check
mandates w.r.t. representability. Previously, we discussed other ways of
fixing the iss
On Tue, Sep 9, 2025 at 4:26 AM H.J. Lu wrote:
>
> Enable SSE4.1 ceil/floor/trunc for -Os to replace a function call with
> roundss or roundsd.
>
> gcc/
>
> PR target/121861
> * config/i386/i386.cc (ix86_optab_supported_p): Return true for
> SSE4.1 with SSE math for floor_op
From: Pan Li
In some cases the widen-mul may generate unnecessary cast similar
as below, this patch series would like to refine it. Then, some
pattern match like SAT_MUL could be simplified based on it.
29 │ _1 = (__int128 unsigned) a_8(D);
30 │ _2 = (__int128 unsigned) b_9(D);
31
Hi all,
Note that the commit message of PATCH 1/1 describes pretty much
the same as this cover letter but the cover letter explains its
background, real (example) assembly code and LLVM status.
So, refer the commit message only when necessary.
While I'm working with a Rust compiler dev and experi
On Mon, Sep 8, 2025 at 4:24 PM Kees Cook wrote:
>
> On Tue, Sep 09, 2025 at 12:13:19AM +0200, Martin Uecker wrote:
> > Sorry, example should have been this:
> >
> > typedef int arr_t[];
> > typedef int arr3_t[3];
> >
> > void f(arr3_t*);
> >
> > void g(void (*fp)(arr_t*)) {
> >
> > int a[3];
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 07d40f459e3..bfd43fba101 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -659,7 +659,7 @@ static const struct riscv_tune_param
tt_ascalon_d8_tune_info = {
{COSTS_N_INSNS (3), COSTS_N_INSNS (3)},
On Fri, Sep 5, 2025 at 4:39 PM Alex Coplan wrote:
>
> Hi,
>
> I noticed that the -fdump-tree-*-folding flag isn't documented in
> the Developer options section of invoke.texi; this patch fixes that.
>
> Tested by building the HTML docs and spot-checking in a browser.
>
> OK for trunk?
OK.
> Than
I guess for those F16 move or vec_extract patterns it can still be
supported even without zvfh/zvfhmin support, but those patterns are
guarded by either ZVFH or ZVFHMIN now.
However I think what I write above is kind of an optimization, and I
think your fix is reasonable for the long term, it can
Hi All,
This 'obvious' fix has been pushed as r16-3648.
Paul
Change.Logs
Description: Binary data
diff --git a/gcc/fortran/resolve.cc b/gcc/fortran/resolve.cc
index d51301aec44..bd0e6e9f540 100644
--- a/gcc/fortran/resolve.cc
+++ b/gcc/fortran/resolve.cc
@@ -5871,13 +5871,47 @@ gfc_resolve_subs
Pushed to original patch (without LWG4351 changes) to trunk.
On Sat, Sep 6, 2025 at 3:18 PM Luc Grosheintz
wrote:
>
>
> On 9/5/25 19:58, Jonathan Wakely wrote:
> > On Fri, 5 Sept 2025 at 16:26, Jonathan Wakely
> wrote:
> >>
> >> On Thu, 4 Sept 2025 at 13:22, Luc Grosheintz
> wrote:
> >>>
> >>>
On Mon, Sep 08, 2025 at 08:19:39AM +0200, Matthias Kretz wrote:
> Andrew Pinski [Friday, 5 September 2025, 22:50:30 CEST]:
> > On Fri, Sep 5, 2025 at 4:06 AM Matthias Kretz wrote:
> > > diff --git a/gcc/testsuite/g++.dg/pr121801_float16_cst_mangling.C b/gcc/
> > > testsuite/g++.dg/pr121801_float16
On Mon, Sep 8, 2025 at 5:30 AM Andrew Pinski
wrote:
>
> It turns out easy to add support for memcpy copy prop when the memcpy
> has changed into `MEM` copy.
> Instead of rejecting right out we need to figure out that
> `a` and `MEM[&a]` are equivalent in terms of address and size.
> And then creat
> Hi,
>
> Fix ICE with AutoFDO by adding initialization check
> before accessing IPA counts to avoid issues with uninitialized profile
> counts in self-recursive clone processing.
OK,
thanks!
Honza
>
> Thanks,
> Kugan
>
>
>
On Sun, Sep 7, 2025 at 3:21 PM Gerald Pfeifer wrote:
>
> Sam pointed out inconsistent capitalization of GNU Binutils, and
> looking around I found these two occurrences.
>
> Instead of adjusting them, I suggest to drop the references altogether
> since ... (see below)
>
> Okay?
OK.
Richard.
> G
Hello,
> Hi Honza,
>
>
> > On 5 Sep 2025, at 1:30 am, Jan Hubicka wrote:
> >
> > External email: Use caution opening links or attachments
> >
> >
> > Hi,
> > with -fpartial-profling we ICE building perlbench and gcc from spec2k17
> > since
> > afdo_annotate_cfg applies knowlede about zero pr
On 9/7/25 5:34 PM, Jonathan Wakely wrote:
On Sat, 6 Sept 2025 at 14:12, Luc Grosheintz wrote:
The concept __integral_constant_like doesn't consider traits with a
boolean member `value` as an integer constant. This is done to reject
various completely unrelated traits like is_const, is_abstra
On Sat, Sep 06, 2025 at 03:54:31PM +1000, Nathaniel Shead wrote:
> * g++.dg/modules/default-arg-4_a.C: XFAIL bogus errors.
> * g++.dg/modules/default-arg-4_b.C: Likewise.
> --- a/gcc/testsuite/g++.dg/modules/default-arg-4_a.C
> +++ b/gcc/testsuite/g++.dg/modules/default-arg-4_a.C
> @@ -
On Mon, 8 Sept 2025 at 07:46, Tomasz Kaminski wrote:
>
>
>
> On Fri, Sep 5, 2025 at 10:57 PM Jonathan Wakely wrote:
>>
>> C++17 has a 'Requires:' precondition that the two random access iterator
>> types have the same value type. In C++20 that is a 'Mandates:'
>> requirement which we must diagnos
From: Alfie Richards
Hi all,
I sent this previously after Richard S noted that this hook was lacking
comments but it seemingly got lost in the period where I broke my send-mail
config.
This describes the hook as it will be after my FMV patch series lands, so wont
commit until thats in.
Reg tes
On 06/09/2025 18:45, Jeff Law wrote:
These look fine. But the patchfile itself doesn't look like it got
updated.
Assuming you update the patchfile to have patterns like you've shown
above and make the obvious comment fixes, then this is good to go.
Sorry, seems like I attached the wrong pat
> On 8 Sep 2025, at 12:46, Richard Biener wrote:
>
> On Mon, Sep 8, 2025 at 1:04 PM Ville Voutilainen
> wrote:
>>
>> On Mon, 8 Sept 2025 at 13:54, Richard Biener
>> wrote:
>>> That said, I see no point in std::observable_checkpoint to be represented
>>> in the IL at all if all it is is to
Hello,
On Mon, 8 Sep 2025, Ville Voutilainen wrote:
> But I can (more slowly) dig up what the other developer tried to use for
> the prints. It isn't printf, printf doesn't trigger the problem because
> optimizers know what printf is. The print function was some
> android-specific logging func
-mno-direct-extern-access is used to disable direct access to external
symbol in executable for x86. Add -fPIE to disable direct access to
external symbol for other targets.
PR fortran/107421
PR testsuite/121848
* gfortran.dg/gomp/pr107421.f90: Pass -fPIE for non-x86 targe
On Mon, Sep 8, 2025 at 2:45 PM Jonathan Wakely wrote:
> This adds checks when incrementing the shared count and weak count and
> will trap if they would be
> be incremented past its maximum. The maximum value is the value at which
> incrementing it produces an invalid use_count(). So that is eith
> Hi,
>
> Fix ICE with AutoFDO by adding initialization check
> before accessing IPA counts to avoid issues with uninitialized profile
> counts in self-recursive clone processing.
+ n->make_profile_local ();
+ if (n->count.quality () == AFDO)
+ n->make_profil
Allows profiles input in '--with-arch'. Check profiles with
'riscv-profiles.def'.
gcc/ChangeLog:
* config.gcc: Accept RISC-V profiles in `--with-arch`.
* config/riscv/arch-canonicalize: Add profile detection and
skip canonicalization for profiles.
---
gcc/config.gcc
Moving RISC-V Profiles definations into 'riscv-profiles.def'. Add comments for
'riscv_profiles'.
gcc/ChangeLog:
* common/config/riscv/riscv-common.cc (struct riscv_profiles): Add
comments.
(RISCV_PROFILE): Removed.
* config/riscv/riscv-profiles.def: New file.
---
gcc/co
When the vectorizer removes a forwarder created earlier by split_edge
it uses redirect_edge_pred for convenience and efficiency. That breaks
down when the edge split is originating from an asm goto as that is
a jump that needs adjustments from redirect_edge_and_branch. The
following factores a si
> On 8 Sep 2025, at 15:01, Richard Biener wrote:
>
> On Mon, Sep 8, 2025 at 3:54 PM Iain Sandoe wrote:
>>
>>
>>
>>> On 8 Sep 2025, at 14:40, Richard Biener wrote:
>>>
>>> On Mon, Sep 8, 2025 at 3:16 PM Jakub Jelinek wrote:
On Mon, Sep 08, 2025 at 03:05:58PM +0200, Richard Bie
On Mon, Sep 8, 2025 at 7:31 AM Sam James wrote:
>
> This didn't show up in my inbox for some reason, so sorry for awkward
> reply:
>
> Can you do this? { dg-additional-options "-fPIE" { target pie } }
>
This test requires no direct access to external symbols from
executable. On x86, -mno-direct-
> Am 08.09.2025 um 16:28 schrieb Iain Sandoe :
>
>
>
>>> On 8 Sep 2025, at 15:20, Iain Sandoe wrote:
>>>
>>>
>>>
On 8 Sep 2025, at 15:05, Jakub Jelinek wrote:
>>>
>>> On Mon, Sep 08, 2025 at 02:54:18PM +0100, Iain Sandoe wrote:
(for pre-conditions) they lower to a series of
Yuao Ma wrote:
And the latter does not handle EXPR_CONDITIONAL.
Thanks for the tip! It turns out that not only does gfc_traverse_expr
fail to handle conditional expressions, but check_restricted and
gfc_check_init_expr don't either. I've added all the necessary fixes,
and the test case is now in
On Tue, 05 Aug 2025 at 09:21 +, 1nfocalypse wrote:
Implements Philox Engine (P2075R6) and associated tests.
Implements additional feedback from v5 from Patrick Palka.
Also cut some trailing whitespace from the limb propagation
fix in v5.
Apologies for the delay from v5 - I had to finish wri
On Mon, Sep 8, 2025 at 3:16 PM Robin Dapp wrote:
>
> > I guess for those F16 move or vec_extract patterns it can still be
> > supported even without zvfh/zvfhmin support, but those patterns are
> > guarded by either ZVFH or ZVFHMIN now.
> >
> > However I think what I write above is kind of an opti
On 9/8/25 1:08 AM, Robin Dapp wrote:
diff --git a/gcc/config/riscv/riscv.cc b/gcc/config/riscv/riscv.cc
index 07d40f459e3..bfd43fba101 100644
--- a/gcc/config/riscv/riscv.cc
+++ b/gcc/config/riscv/riscv.cc
@@ -659,7 +659,7 @@ static const struct riscv_tune_param
tt_ascalon_d8_tune_info = {
From: Giuseppe D'Angelo
Converting a weak_ptr to a weak_ptr requires calling
lock() on the source object in the general case.
Although the source weak_ptr does contain a raw pointer to
Derived, we can't just get it and (up)cast it to Base, as that will
dereference the pointer in case Base is a v
> On 8 Sep 2025, at 15:05, Jakub Jelinek wrote:
>
> On Mon, Sep 08, 2025 at 02:54:18PM +0100, Iain Sandoe wrote:
>> (for pre-conditions) they lower to a series of statements like
>> if (some check fails)
>> handle the contract violation
>> if (some other check fails)
>> handle the contrac
This patch creates a global function __syncbuf_get_mutex, gated by
_GLIBCXX_HAS_GTHREADS, replacing a static instantiated member
_S_get_mutex used in syncbuf<> construction, and makes the global
symbol visible. A static local table of 16 mutexes is shared among
all specializations of syncbuf<>, cho
Hi,
This is the third version of the patch proposed for master aiming to fix
PR119702. Requesting review of this patch.
The following sequence of assembly in powerpc64le
vspltisw 0,1
vsld 2,2,0
is replaced by this
vaddudm 2,2,2
whenever there is a vector left shift by a c
On Mon, Sep 8, 2025 at 11:41 AM wrote:
>
> From: Alfie Richards
>
> Hi all,
>
> I sent this previously after Richard S noted that this hook was lacking
> comments but it seemingly got lost in the period where I broke my send-mail
> config.
>
> This describes the hook as it will be after my FMV pa
The 09/02/2025 20:46, Joseph Myers wrote:
> On Thu, 28 Aug 2025, alfie.richa...@arm.com wrote:
>
> > @@ -3373,6 +3406,56 @@ pushdecl (tree x)
> > TREE_TYPE (b_use->decl) = b_use->u.type;
> > }
> > }
> > +
> > + /* Check if x is part of a FMV set with b_use. */
> > +
This adds checks when incrementing the shared count and weak count and
will trap if they would be
be incremented past its maximum. The maximum value is the value at which
incrementing it produces an invalid use_count(). So that is either the
maximum positive value of _Atomic_word, or for targets wh
This change doubles the effective range of the std::shared_ptr and
std::weak_ptr reference counts for most 64-bit targets.
The counter type, _Atomic_word, is usually a signed 32-bit int (except
on Solaris v9 where it is a signed 64-bit long). The return type of
std::shared_ptr::use_count() is long
On Mon, 8 Sept 2025 at 14:46, Richard Biener wrote:
> > It's not just to cater to FUD. I have seen Clang remove a complete CFG
> > edge that lead to a non-return from
> > a non-void function. If observable_checkpoint works correctly, the
> > debug prints my junior colleague added trying
> > to see
On Mon, Sep 08, 2025 at 03:05:58PM +0200, Richard Biener wrote:
> is reduced to __builtin_abort () (for C++). That's because it's
> __builtin_unreachable () at the end. I am not aware of any
> other "UB" than missed return that we turn into unreachable(),
> even
>
> unsigned int foo (unsigned in
On Fri, 2025-05-09 at 10:14 +0800, Lulu Cheng wrote:
> From: ChengLulu
>
> PR target/99217
>
> gcc/ChangeLog:
>
> * config/mips/mips.cc (mips_start_function_definition):
> Implements the functionality of '-fpatchable-function-entry='.
> (mips_print_patchable_function_ent
On Mon, Sep 08, 2025 at 12:23:49PM +0200, Matthias Kretz wrote:
> + if (words == 0)
> +{
> + /* _Float16 is the only supported type smaller than 32 bits. */
This comment is incorrect, although the assert is right.
Both _Float16 and decltype (0.0bf16) (aka std::bfloat16_t) are supported
t
> On 8 Sep 2025, at 08:57, Richard Biener wrote:
>
> On Sun, Sep 7, 2025 at 9:43 PM Iain Sandoe wrote:
>>
>> Thanks for the helpful input from reviewers;
>>
>> This version has 4 changes from v1:
>> 1. removes some unrelated changes.
>> 2. As per Jakub's observations, we now special-case
>>
On 9/7/25 3:19 PM, Anton Blanchard wrote:
If-conversion isn't being applied to this nbench code:
#include
#define INTERNAL_FPF_PRECISION 4
typedef uint16_t u16;
void ShiftMantLeft1(u16 *carry, u16 *mantissa)
{
int i;
int new_carry;
u16 accum;
On Mon, 8 Sep 2025, Jakub Jelinek wrote:
> On Mon, Sep 08, 2025 at 02:38:48PM +0200, Richard Biener wrote:
> > When there's an asm goto in the latch of a loop we may not use
> > IP_END IVs since instantiating those would (need to) split the
> > latch edge which in turn invalidates IP_NORMAL positi
On Mon, Sep 8, 2025 at 3:16 PM Jakub Jelinek wrote:
>
> On Mon, Sep 08, 2025 at 03:05:58PM +0200, Richard Biener wrote:
> > is reduced to __builtin_abort () (for C++). That's because it's
> > __builtin_unreachable () at the end. I am not aware of any
> > other "UB" than missed return that we tur
Besides r16-3595, there's another bug in this test: with -std=c23 the
token _Sat isn't recognized as a keyword at all, thus an error massage
different from the expected will be outputted.
Fix it by using -std=gnu23 instead.
gcc/testsuite:
* gcc.dg/fixed-point/bitint-1.c (dg-options): Use
> On 8 Sep 2025, at 14:40, Richard Biener wrote:
>
> On Mon, Sep 8, 2025 at 3:16 PM Jakub Jelinek wrote:
>>
>> On Mon, Sep 08, 2025 at 03:05:58PM +0200, Richard Biener wrote:
>>> is reduced to __builtin_abort () (for C++). That's because it's
>>> __builtin_unreachable () at the end. I am n
On Mon, Sep 08, 2025 at 09:51:32PM +0800, Xi Ruoyao wrote:
> Besides r16-3595, there's another bug in this test: with -std=c23 the
> token _Sat isn't recognized as a keyword at all, thus an error massage
> different from the expected will be outputted.
>
> Fix it by using -std=gnu23 instead.
>
>
On 9/8/25 8:11 AM, Matthias Kretz wrote:
Andrew Pinski [Friday, 5 September 2025, 22:57:02 CEST]:
It seems that Clang and GCC disagree on mangling 80-Bit long double:
https://compiler-explorer.com/z/W1d64PjrP
I like Clang's interpretation of
https://itanium-cxx-abi.github.io/cxx-abi/
abi.html#
* renamed the test to abi/pr121801.C
* changed the comment to include std::bfloat16_t and another space.
- 8< ---
Signed-off-by: Matthias Kretz
gcc/testsuite/ChangeLog:
* g++.dg/abi/pr121801.C: New test.
gcc/cp/ChangeLog:
* mangle.cc (write_real_c
Found by my link checker; pushed.
Gerald
libstdc++-v3:
* doc/xml/manual/using_exceptions.xml: Update link to "Tunables"
section in the Glibc manual.
* doc/html/manual/using_exceptions.html: Regenerate.
---
libstdc++-v3/doc/html/manual/using_exceptions.html | 2 +-
libstd
Hi,
This is the third version of the patch proposed for master aiming to fix
PR119702. Requesting review of this patch.
The following sequence of assembly in powerpc64le
vspltisw 0,1
vsld 2,2,0
is replaced by this
vaddudm 2,2,2
whenever there is a vector left shift by a c
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