Got it, will have a try.
Pan
From: juzhe.zh...@rivai.ai
Sent: Tuesday, September 12, 2023 9:30 AM
To: Li, Pan2
Cc: kito.cheng ; gcc-patches ;
Wang, Yanzhang
Subject: Re: RE: [PATCH v1] RISC-V: Implement RESOLVE_OVERLOADED_BUILTIN for
RVV intrinsic
Add a function call
ng APi support.
This patch only enable the resolving for vmv_v, the test cases ensure the
correctness for
both the exiting API and overloaded API of vmv_v.
Will send the v3 for this change.
Pan
From: juzhe.zh...@rivai.ai
Sent: Tuesday, September 12, 2023 3:47 PM
To: Li, Pan2 ; gcc-patche
Committed, thanks Robin.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Robin Dapp via Gcc-patches
Sent: Tuesday, September 12, 2023 7:07 PM
To: Juzhe-Zhong ; gcc-patches@gcc.gnu.org
Cc: kito.ch...@sifive.com; kito.ch...@gmail.com
Subject: Re: [PATCH V5] RISC-V: Support Dynamic L
Committed, thanks Jeff.
Pan
-Original Message-
From: Jeff Law
Sent: Tuesday, September 12, 2023 9:12 PM
To: Li, Pan2 ; gcc-patches@gcc.gnu.org
Cc: Wang, Yanzhang ; kito.ch...@gmail.com;
juzhe.zh...@rivai.ai
Subject: Re: [PATCH v1] RISC-V: Remove unused structure in cost model
On 9
Committed, thanks Kito.
Pan
-Original Message-
From: Kito Cheng
Sent: Wednesday, September 13, 2023 2:16 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang
Subject: Re: [PATCH v1] RISC-V: Bugfix PR111362 for incorrect frm emit
LGTM :)
On Wed, Sep 13
Committed, thanks Robin.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Robin Dapp via Gcc-patches
Sent: Wednesday, September 13, 2023 8:46 PM
To: juzhe.zh...@rivai.ai; gcc-patches
Cc: rdapp@gmail.com; kito.cheng ; Kito.cheng
; jeffreyalaw
Subject: Re: [PATCH] RISC-V: Supp
Committed, thanks Kito.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Kito Cheng via Gcc-patches
Sent: Thursday, September 14, 2023 3:56 PM
To: Juzhe-Zhong
Cc: gcc-patches@gcc.gnu.org; kito.ch...@gmail.com; jeffreya...@gmail.com;
rdapp@gmail.com
Subject: Re: [PATCH V3] RIS
Committed, thanks Kito.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Kito Cheng via Gcc-patches
Sent: Thursday, September 14, 2023 10:23 PM
To: Juzhe-Zhong
Cc: GCC Patches ; Kito Cheng ;
Jeff Law ; Robin Dapp
Subject: Re: [PATCH] RISC-V: Support VLS modes mask operations
LG
Thanks Juzhe for comments, got the point and will have a try for hashmap liked
approach to get the non-overloaded later in PATCH v4. Sorry for that in the
middle of something.
Pan
From: juzhe.zh...@rivai.ai
Sent: Friday, September 15, 2023 10:21 AM
To: Li, Pan2 ; gcc-patches
Cc: Li, Pan2
Thanks Lehua, actually Yes.
Consider we will have a try for hashmap way and will keep you posted.
Pan
-Original Message-
From: Lehua Ding
Sent: Friday, September 15, 2023 10:29 AM
To: Li, Pan2 ; gcc-patches@gcc.gnu.org
Cc: Wang, Yanzhang ; kito.ch...@gmail.com;
juzhe.zh...@rivai.ai
Committed, thanks Richard.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Richard Biener via Gcc-patches
Sent: Friday, September 15, 2023 5:38 PM
To: Juzhe-Zhong
Cc: gcc-patches@gcc.gnu.org; jeffreya...@gmail.com; richard.sandif...@arm.com
Subject: Re: [PATCH] test: Isolate slp-
Committed, thanks Richard.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Richard Biener via Gcc-patches
Sent: Friday, September 15, 2023 5:38 PM
To: Juzhe-Zhong
Cc: gcc-patches@gcc.gnu.org; jeffreya...@gmail.com; richard.sandif...@arm.com
Subject: Re: [PATCH] test: Block slp-16
Committed, thanks Richard.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Richard Biener via Gcc-patches
Sent: Friday, September 15, 2023 6:07 PM
To: Juzhe-Zhong
Cc: gcc-patches@gcc.gnu.org; jeffreya...@gmail.com
Subject: Re: [PATCH] test: Block vect_strided5 for slp-34-big-arra
Committed, thanks Richard.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Richard Biener via Gcc-patches
Sent: Friday, September 15, 2023 6:07 PM
To: Juzhe-Zhong
Cc: gcc-patches@gcc.gnu.org; jeffreya...@gmail.com
Subject: Re: [PATCH] test: Block SLP check of slp-34.c for vect_st
Committed, thanks Richard.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Richard Biener via Gcc-patches
Sent: Friday, September 15, 2023 6:07 PM
To: Juzhe-Zhong
Cc: gcc-patches@gcc.gnu.org; jeffreya...@gmail.com
Subject: Re: [PATCH] test: Block SLP check of slp-35.c for vect_st
Committed, thanks Juzhe.
Pan
From: 钟居哲
Sent: Saturday, September 16, 2023 7:21 AM
To: Li, Pan2 ; gcc-patches
Cc: Li, Pan2 ; Wang, Yanzhang ;
kito.cheng
Subject: Re: [PATCH v1] RISC-V: Support FP SGNJX autovec for VLS mode
lgtm
juzhe.zh...@rivai.ai
Committed, thanks Robin.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Robin Dapp via Gcc-patches
Sent: Friday, September 15, 2023 11:44 PM
To: 钟居哲 ; Jeff Law ; kito.cheng
Cc: rdapp@gmail.com; gcc-patches ; kito.cheng
Subject: Re: [PATCH V4] RISC-V: Expand VLS mode to sc
eptember 17, 2023 11:53 PM
To: Li, Pan2 ; gcc-patches@gcc.gnu.org
Cc: juzhe.zh...@rivai.ai; Wang, Yanzhang ;
kito.ch...@gmail.com; rdapp@gmail.com
Subject: Re: [PATCH v1] RISC-V: Bugfix for scalar move with merged operand
On 9/17/23 01:42, Pan Li via Gcc-patches wrote:
> From: Pan Li
&g
Committed, thanks Kito.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Kito Cheng via Gcc-patches
Sent: Monday, September 18, 2023 4:20 PM
To: Juzhe-Zhong
Cc: gcc-patches@gcc.gnu.org; kito.ch...@sifive.com; jeffreya...@gmail.com;
rdapp@gmail.com
Subject: Re: [PATCH] RISC-V:
Committed, thanks Kito.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Kito Cheng via Gcc-patches
Sent: Monday, September 18, 2023 4:01 PM
To: Juzhe-Zhong
Cc: gcc-patches@gcc.gnu.org; kito.ch...@gmail.com; jeffreya...@gmail.com;
rdapp@gmail.com
Subject: Re: [PATCH] RISC-V:
Thanks Robin, let's wait Jeff's confirmation for this.
Pan
-Original Message-
From: Robin Dapp
Sent: Monday, September 18, 2023 6:01 PM
To: Jeff Law ; Li, Pan2 ;
gcc-patches@gcc.gnu.org
Cc: rdapp@gmail.com; juzhe.zh...@rivai.ai; Wang, Yanzhang
; kito.ch...@gmail.com
S
Committed, thanks Jeff and Robin.
Pan
-Original Message-
From: Jeff Law
Sent: Tuesday, September 19, 2023 1:44 AM
To: Robin Dapp ; Li, Pan2 ;
gcc-patches@gcc.gnu.org
Cc: juzhe.zh...@rivai.ai; Wang, Yanzhang ;
kito.ch...@gmail.com
Subject: Re: [PATCH v1] RISC-V: Bugfix for scalar move
Committed, thanks Kito.
Pan
-Original Message-
From: Kito Cheng
Sent: Monday, September 18, 2023 11:36 AM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang
Subject: Re: [PATCH v1] RISC-V: Support VLS mode for vec_set
LGTM
On Mon, Sep 18, 2023 at 11
Passed the X86 bootstrap and regression tests.
Pan
-Original Message-
From: Li, Pan2
Sent: Tuesday, April 18, 2023 5:12 PM
To: Li, Pan2 ; Richard Biener
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@sifive.com;
rguent...@suse.de; Wang, Yanzhang ;
richard.sandif
Oh, I see. The message need to be re-generated. Thank you for pointing out,
will update ASPA.
Pan
-Original Message-
From: Richard Biener
Sent: Wednesday, April 19, 2023 2:40 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@sifive.com;
richard.sandif
.c
#...new file: gcc/testsuite/gcc.target/riscv/simplify_ior_optimization.c
Pan
-Original Message-
From: Li, Pan2
Sent: Wednesday, April 19, 2023 2:47 PM
To: Richard Biener
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@sifive.com;
richard.sandif...@arm.com; W
Passed the X86 bootstrap and regression tests.
Pan
-Original Message-
From: Li, Pan2
Sent: Wednesday, April 19, 2023 11:21 AM
To: gcc-patches@gcc.gnu.org
Cc: juzhe.zh...@rivai.ai; kito.ch...@sifive.com; Wang, Yanzhang
; Li, Pan2
Subject: [PATCH] RISC-V: Allow VMS{Compare} (V1, V1
Thank you for information. Updated the v3 version as below.
https://gcc.gnu.org/pipermail/gcc-patches/2023-April/616154.html
Pan
-Original Message-
From: Richard Biener
Sent: Wednesday, April 19, 2023 4:52 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch
Sure thing.
For Changlog, I consider it was generated automatically in previous. LOL.
Pan
-Original Message-
From: Kito Cheng
Sent: Wednesday, April 19, 2023 5:46 PM
To: juzhe.zh...@rivai.ai
Cc: Li, Pan2 ; gcc-patches ;
Kito.cheng ; Wang, Yanzhang
Subject: Re: Re: [PATCH] RISC-V
Update the Patch v2 for more detail information for clarification. Please help
to review continuously.
https://gcc.gnu.org/pipermail/gcc-patches/2023-April/616175.html
Pan
-Original Message-
From: Li, Pan2
Sent: Wednesday, April 19, 2023 6:33 PM
To: Kito Cheng ; juzhe.zh...@rivai.ai
Hi Kito,
There is one patch reviewed already and I suppose it will be ok after GCC 14
open. Could you please help to double check about it?
Pann
-Original Message-
From: Gcc-patches On Behalf
Of Li, Pan2 via Gcc-patches
Sent: Wednesday, March 29, 2023 6:39 PM
To: juzhe.zh...@rivai.ai
Kindly ping for the PATCH v2. Just FYI there will be some underlying
investigation based on this PATCH like VMSEQ.
Pan
-Original Message-
From: Li, Pan2
Sent: Wednesday, April 19, 2023 7:27 PM
To: 'Kito Cheng' ; 'juzhe.zh...@rivai.ai'
Cc: 'gcc-patche
Thanks kito, will try to reproduce this issue and keep you posted.
Pan
-Original Message-
From: Kito Cheng
Sent: Friday, April 21, 2023 6:17 PM
To: Li, Pan2
Cc: juzhe.zh...@rivai.ai; gcc-patches ; Kito.cheng
; Wang, Yanzhang
Subject: Re: Re: [PATCH] RISC-V: Allow VMS{Compare} (V1
PM
To: Li, Pan2
Cc: juzhe.zh...@rivai.ai; gcc-patches ; Kito.cheng
; Wang, Yanzhang
Subject: Re: Re: [PATCH] RISC-V: Allow VMS{Compare} (V1, V1) shortcut
optimization
Hi Pan:
One idea come to my mind, maybe we should add a new define_insn_and_split
pattern instead of change @pred_mov
On Fri, A
Hi,
Just synced this patch with upstream, and passed the X86 bootstrap and
regression test already.
Pan
-Original Message-
From: Li, Pan2
Sent: Thursday, April 20, 2023 9:57 PM
To: kito.ch...@sifive.com
Cc: gcc-patches ; Kito.cheng ;
Wang, Yanzhang ; juzhe.zh...@rivai.ai
Subject: RE
g the decision? Thanks in advance!
Pan
-Original Message-
From: Kito Cheng
Sent: Tuesday, April 25, 2023 9:08 PM
To: Li, Pan2 ; Jeff Law
Cc: juzhe.zh...@rivai.ai; gcc-patches ; Kito.cheng
; Wang, Yanzhang
Subject: Re: Re: [PATCH] RISC-V: Allow VMS{Compare} (V1, V1) shortcut
optimiz
Oh, I see. This PATCH month drafted ago and missed that part. Sorry for
inconvenient and will update it ASAP.
Pan
-Original Message-
From: Kito Cheng
Sent: Tuesday, April 25, 2023 10:05 PM
To: Li, Pan2
Cc: kito.ch...@sifive.com; gcc-patches ; Wang,
Yanzhang ; juzhe.zh...@rivai.ai
I see. If there is no question from Juzhe, I will try to implement it follow
the option 2.
Pan
From: Kito Cheng
Sent: Tuesday, April 25, 2023 9:57 PM
To: Li, Pan2
Cc: Kito Cheng ; Jeff Law ;
juzhe.zh...@rivai.ai; gcc-patches ; Wang, Yanzhang
Subject: Re: Re: [PATCH] RISC-V: Allow VMS
Thanks for patient, update the PATCH v3 as below link.
https://gcc.gnu.org/pipermail/gcc-patches/2023-April/616686.html
Pan
-Original Message-
From: Li, Pan2
Sent: Tuesday, April 25, 2023 10:10 PM
To: Kito Cheng
Cc: kito.ch...@sifive.com; gcc-patches ; Wang,
Yanzhang ; juzhe.zh
Aligned with Ju-Zhe, will take the option 2 for the VMS{Compare} optimization.
Pan
From: Li, Pan2
Sent: Tuesday, April 25, 2023 10:11 PM
To: Kito Cheng
Cc: Kito Cheng ; Jeff Law ;
juzhe.zh...@rivai.ai; gcc-patches ; Wang, Yanzhang
Subject: RE: Re: [PATCH] RISC-V: Allow VMS{Compare} (V1, V1
Thanks a lot, kito, will pay more attention for the changelogs.
Pan
From: Kito Cheng
Sent: Wednesday, April 26, 2023 11:30 AM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang
Subject: Re: [PATCH v3] RISC-V: Bugfix for RVV vbool*_t vn_reference_equal
Committed
Log:
* gcc.target/riscv/rvv/base/vlmul_ext-1.c: New test.
Pan
From: juzhe.zhong
Sent: Wednesday, April 26, 2023 8:15 PM
To: Wang, Yanzhang
Cc: gcc-patches@gcc.gnu.org; kito.ch...@sifive.com; Li, Pan2
; Wang, Yanzhang
Subject: Re: [PATCH] RISC-V: ICE for vlmul_ext_v intrinsic API
LGTM. Thanks
Thanks Kito. It comes from some experience of Ju-Zhe for auto vectorization in
previous.
Pan
-Original Message-
From: Kito Cheng
Sent: Wednesday, April 26, 2023 9:24 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@sifive.com; Wang,
Yanzhang
Subject: Re
2023 11:00 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang
Subject: Re: [PATCH] RISC-V: Allow RVV VMS{Compare}(V1, V1) simplify to VMCLR
> Could you try something like this? that should be more generic:
>
> (define_split
> [(set (match_operand:VB
Thanks, kito.
Yes, you are right. I am investigating this right now from simplify rtl. Given
we have one similar case VMORN in previous.
Pan
-Original Message-
From: Kito Cheng
Sent: Friday, April 28, 2023 2:41 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang
Passed both the X86 bootstrap and regression test.
Pan
-Original Message-
From: Li, Pan2
Sent: Friday, April 28, 2023 2:45 PM
To: Kito Cheng
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang
Subject: RE: [PATCH v2] RISC-V: Allow RVV VMS{Compare}(V1, V1) simplify to
Kindly ping for this ICE fix.
Pan
-Original Message-
From: Wang, Yanzhang
Sent: Wednesday, April 26, 2023 9:06 PM
To: gcc-patches@gcc.gnu.org
Cc: juzhe.zh...@rivai.ai; kito.ch...@sifive.com; Li, Pan2 ;
Wang, Yanzhang
Subject: [PATCH v2] RISC-V: ICE for vlmul_ext_v intrinsic API
From
Cool, Thank you!
Pan
-Original Message-
From: Kito Cheng
Sent: Friday, April 28, 2023 8:37 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang
Subject: Re: [PATCH v2] RISC-V: Allow RVV VMS{Compare}(V1, V1) simplify to VMCLR
pushed, thanks!
-Original Message-
From: Jeff Law
Sent: Saturday, April 29, 2023 5:48 AM
To: Li, Pan2 ; gcc-patches@gcc.gnu.org
Cc: juzhe.zh...@rivai.ai; kito.ch...@sifive.com; Wang, Yanzhang
Subject: Re: [PATCH] RISC-V: Allow RVV VMS{Compare}(V1, V1) simplify to VMSET
On 4/28/23 09:21, Pan Li via Gcc
Hi Jeff
Just have a try in simplify_rtx for this optimization in PATCH v2. Could you
please help to share any idea about this when you free? Thank you!
https://gcc.gnu.org/pipermail/gcc-patches/2023-April/617117.html
Pan
-Original Message-
From: Li, Pan2
Sent: Saturday, April 29
policy and vector length as well.
Pan
-Original Message-
From: Kito Cheng
Sent: Sunday, April 30, 2023 9:40 AM
To: Jeff Law
Cc: Li, Pan2 ; gcc-patches@gcc.gnu.org;
juzhe.zh...@rivai.ai; Wang, Yanzhang ; Andrew Waterman
Subject: Re: [PATCH] RISC-V: Allow RVV VMS{Compare}(V1, V1) s
Thanks all for comments, will work with kito to make it happen.
Pan
-Original Message-
From: Jeff Law
Sent: Wednesday, May 3, 2023 12:28 AM
To: Kito Cheng
Cc: Li, Pan2 ; gcc-patches@gcc.gnu.org;
juzhe.zh...@rivai.ai; Wang, Yanzhang ; Andrew Waterman
Subject: Re: [PATCH] RISC-V
Thanks Juzhe, make sense, let me update it soon.
Pan
From: juzhe.zh...@rivai.ai
Sent: Thursday, May 4, 2023 4:40 PM
To: Li, Pan2 ; gcc-patches
Cc: Kito.cheng ; Li, Pan2 ; Wang,
Yanzhang
Subject: Re: [PATCH] RISC-V: Legitimise the const0_rtx for RVV indexed
load/store
vluxei32.v v1,(0
I tried the memory profiling by valgrind --tool=memcheck --trace-children=yes
for this change, target the SPEC 2006 INT part with rv64gcv. Note we only count
the bytes allocated from valgrind log like this "==2832896== total heap
usage: 208 allocs, 165 frees, 123,204 bytes allocated".
Conside
Updated the PATCH v2 with x86 bootstrap and regression test passed.
https://gcc.gnu.org/pipermail/gcc-patches/2023-May/617449.html
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Li, Pan2 via Gcc-patches
Sent: Thursday, May 4, 2023 4:44 PM
To: juzhe.zh...@rivai.ai; gcc-patches
Hi kito,
Could you please help to share any suggestion about the PATCH? Comparing the V1
and V2.
Pan
-Original Message-
From: Li, Pan2
Sent: Wednesday, May 3, 2023 7:18 PM
To: Jeff Law ; Kito Cheng
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang
; Andrew Waterman
Ok, sounds good. Thank you!
Pan
-Original Message-
From: Kito Cheng
Sent: Friday, May 5, 2023 8:37 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; Wang, Yanzhang
Subject: Re: [PATCH] RISC-V: Allow RVV VMS{Compare}(V1, V1) simplify to VMSET
I will take V1 and
Thank you!
-Original Message-
From: Kito Cheng
Sent: Friday, May 5, 2023 10:52 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@sifive.com; Wang,
Yanzhang
Subject: Re: [PATCH v2] RISC-V: Legitimise the const0_rtx for RVV indexed
load/store
pushed to
, 2023 2:25 PM
To: Li, Pan2
Cc: 钟居哲 ; kito.cheng ;
richard.sandiford ; Jeff Law
; gcc-patches ; palmer
; jakub
Subject: RE: Re: [PATCH] machine_mode type size: Extend enum size from 8-bit to
16-bit
On Fri, 5 May 2023, Li, Pan2 wrote:
> I tried the memory profiling by valgrind --tool=memch
data structure.
I think the only problem is the mode in tree data structure.
juzhe.zh...@rivai.ai<mailto:juzhe.zh...@rivai.ai>
From: Kito Cheng<mailto:kito.ch...@gmail.com>
Date: 2023-05-06 09:53
To: Li, Pan2<mailto:pan2...@intel.com>
Yes, that makes sense, will have a try and keep you posted.
Pan
-Original Message-
From: Kito Cheng
Sent: Saturday, May 6, 2023 10:19 AM
To: Li, Pan2
Cc: juzhe.zh...@rivai.ai; rguenther ; richard.sandiford
; jeffreyalaw ; gcc-patches
; palmer ; jakub
Subject: Re: Re: [PATCH
Picked all changes mentioned in previous to single patch as attachment. Please
help to review if any mistake.
Pan
-Original Message-
From: Li, Pan2
Sent: Saturday, May 6, 2023 10:20 AM
To: Kito Cheng
Cc: juzhe.zh...@rivai.ai; rguenther ; richard.sandiford
; jeffreyalaw ; gcc-patches
its.
rtx_def mode 8 => 12 bits.
tree_base code 16 => 12 bits.
Pan
-----Original Message-
From: Li, Pan2
Sent: Saturday, May 6, 2023 10:49 AM
To: 'Kito Cheng'
Cc: 'juzhe.zh...@rivai.ai' ; 'rguenther'
; 'richard.sandiford' ;
'jeffreyalaw&#
I see. Thank you, will have a try soon.
Pan
-Original Message-
From: Jeff Law
Sent: Sunday, May 7, 2023 11:24 PM
To: Li, Pan2 ; Kito Cheng
Cc: juzhe.zh...@rivai.ai; rguenther ; richard.sandiford
; gcc-patches ; palmer
; jakub
Subject: Re: [PATCH] machine_mode type size: Extend enum
-Original Message-----
From: Li, Pan2
Sent: Saturday, May 6, 2023 10:20 AM
To: Kito Cheng
Cc: juzhe.zh...@rivai.ai; rguenther ; richard.sandiford
; jeffreyalaw ; gcc-patches
; palmer ; jakub
Subject: RE: Re: [PATCH] machine_mode type size: Extend enum size from 8-bit to
16-bit
Yes, th
Oops. Actually I am patching a version as you mentioned like storage
allocation. Thank you Richard, will try your suggestion and keep you posted.
Pan
-Original Message-
From: Richard Biener
Sent: Monday, May 8, 2023 2:30 PM
To: Jeff Law
Cc: Li, Pan2 ; Kito Cheng ;
juzhe.zh
essage-
From: Li, Pan2
Sent: Monday, May 8, 2023 2:42 PM
To: Richard Biener ; Jeff Law
Cc: Kito Cheng ; juzhe.zh...@rivai.ai; richard.sandiford
; gcc-patches ; palmer
; jakub
Subject: RE: [PATCH] machine_mode type size: Extend enum size from 8-bit to
16-bit
Oops. Actually I am patching a vers
f mode 8 => 12 bits.
tree_base code 16 => 12 bits.
Pan
-Original Message-
From: Richard Biener
Sent: Monday, May 8, 2023 3:38 PM
To: Li, Pan2
Cc: Jeff Law ; Kito Cheng ;
juzhe.zh...@rivai.ai; richard.sandiford ;
gcc-patches ; palmer ; jakub
Subject: RE: [PATCH] machine_mode ty
%
| 3967897551 +1.1%
483.xalancbmk | 165897692838 | 166818255397 +0.6%|
166819397831 +0.6%
Pan
-Original Message-
From: Li, Pan2
Sent: Monday, May 8, 2023 4:06 PM
To: Richard Biener
Cc: Jeff Law ; Kito Cheng ;
juzhe.zh...@rivai.ai; richard.sandiford ;
gcc-patches
Sure thing, I will have a try and keep you posted.
Pan
-Original Message-
From: Richard Biener
Sent: Tuesday, May 9, 2023 6:26 PM
To: Richard Sandiford
Cc: Li, Pan2 ; Jeff Law ; Kito Cheng
; juzhe.zh...@rivai.ai; gcc-patches
; palmer ; jakub
Subject: Re: [PATCH] machine_mode type
Great! Thank you ;)
-Original Message-
From: Kito Cheng
Sent: Thursday, March 23, 2023 4:41 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@sifive.com
Subject: Re: [PATCH] RISC-V: Bugfix for rvv bool mode size adjustment
committed, thanks for the reminder
Thank you Biener for the professional suggestion. That make it more clean and
simple, and update the PATCH v2 for this already.
Pan
-Original Message-
From: Richard Biener
Sent: Wednesday, March 29, 2023 4:10 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch
Cool. Thank you all for this, have a nice day!
Pan
From: juzhe.zh...@rivai.ai
Sent: Wednesday, March 29, 2023 5:35 PM
To: rguenther ; Li, Pan2
Cc: gcc-patches ; Kito.cheng ;
Wang, Yanzhang
Subject: Re: Re: [PATCH v2] RISC-V: Bugfix for RVV vbool*_t vn_reference_equal.
Thanks Richard &&
Hi Jeff,
Do you have any suggestion about this case? Sorry for late response due to not
receive the mail-thread (Copy the latest one from hongtao for reference).
https://gcc.gnu.org/pipermail/gcc-patches/2023-March/614644.html
Pan
On Sun, Mar 26, 2023 at 3:01 AM Jeff Law via Gcc-pat
Yes, RISC-V riscv.h defined the WORD_REGISTER_OPERATIONS to be 1, while
aarch64.h defined it as 0, with below comments. No idea this can fit RISC-V or
not.
/* WORD_REGISTER_OPERATIONS does not hold for AArch64.
The assigned word_mode is DImode but operations narrower than SImode
behave as
The bootstrap in X86 passed with this patch applied, target commit id
a8c8351cf4fedb842988eed4f73304019c361e86 (13.0.1 20230407).
Pan
-Original Message-
From: Gcc-patches On Behalf
Of juzhe.zh...@rivai.ai
Sent: Friday, April 7, 2023 9:48 AM
To: gcc-patches@gcc.gnu.org
Cc: richard.sandi
Sure thing, let me update it ASAP.
Pan
From: juzhe.zh...@rivai.ai
Sent: Friday, April 14, 2023 10:35 AM
To: Li, Pan2 ; gcc-patches
Cc: Kito.cheng ; Wang, Yanzhang
; Li, Pan2
Subject: Re: [PATCH] RISC-V: Add test cases for the RVV mask insn shortcut.
+/* { dg-final { scan-assembler-not
Thanks juzhe, update new version [PATCH v3] for even more checks.
Pan
From: juzhe.zh...@rivai.ai
Sent: Friday, April 14, 2023 10:46 AM
To: Li, Pan2 ; gcc-patches
Cc: Kito.cheng ; Wang, Yanzhang
; Li, Pan2
Subject: Re: [PATCH v2] RISC-V: Add test cases for the RVV mask insn shortcut.
LGTM
--Original Message-
From: Kito Cheng
Sent: Friday, April 14, 2023 2:42 PM
To: Li, Pan2
Cc: juzhe.zh...@rivai.ai; gcc-patches ; Kito.cheng
; Wang, Yanzhang
Subject: Re: [PATCH v2] RISC-V: Add test cases for the RVV mask insn shortcut.
OK, thanks for the patch :)
On Fri, Apr 14, 2023 at 1
BTW, this patch will be in GCC 13 or master? The underlying patches may depend
on this tests for ensuring correctness.
Pan
-Original Message-
From: Li, Pan2
Sent: Friday, April 14, 2023 2:47 PM
To: Kito Cheng
Cc: juzhe.zh...@rivai.ai; gcc-patches ; Kito.cheng
; Wang, Yanzhang
Cool, thank you!
Pan
-Original Message-
From: Kito Cheng
Sent: Monday, April 17, 2023 9:52 AM
To: Li, Pan2
Cc: juzhe.zh...@rivai.ai; gcc-patches ; Kito.cheng
; Wang, Yanzhang
Subject: Re: [PATCH v2] RISC-V: Add test cases for the RVV mask insn shortcut.
Pushed to trunk :)
On Mon
Passed the X86 bootstrap and regression tests.
Pan
-Original Message-
From: Li, Pan2
Sent: Monday, April 17, 2023 10:50 PM
To: gcc-patches@gcc.gnu.org
Cc: juzhe.zh...@rivai.ai; kito.ch...@sifive.com; rguent...@suse.de; Li, Pan2
; Wang, Yanzhang ;
richard.sandif...@arm.com
Subject
Thanks Richard for comments, CIL and will have a try for the suggestions.
Pan
-Original Message-
From: Richard Biener
Sent: Tuesday, April 18, 2023 4:00 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch...@sifive.com;
rguent...@suse.de; Wang, Yanzhang
I look into the IOR simplification code for this optimization. Mostly I try to
implement them with generic vector operations.
Pan
-Original Message-
From: Richard Biener
Sent: Tuesday, April 18, 2023 4:01 PM
To: Li, Pan2
Cc: gcc-patches@gcc.gnu.org; juzhe.zh...@rivai.ai; kito.ch
Update the PATCH v2 here,
https://gcc.gnu.org/pipermail/gcc-patches/2023-April/615937.html.
Running the boostrap/regression test, and keep you posted.
Pan
-Original Message-
From: Gcc-patches On Behalf
Of Li, Pan2 via Gcc-patches
Sent: Tuesday, April 18, 2023 4:20 PM
To: Richard
901 - 985 of 985 matches
Mail list logo
