Andrew Pinski [mailto:pins...@gmail.com]
> > Sent: 16 August 2021 21:17
> > To: Dragan Mladjenovic
> > Cc: gcc-patches@gcc.gnu.org
> > Subject: Re: [PATCH] [MIPS] Hazard barrier return support
> >
> > On Mon, Aug 16, 2021 at 7:43 AM Dragan Mladjenovic via Gcc-patches
>
lto:pins...@gmail.com]
> > > Sent: 16 August 2021 21:17
> > > To: Dragan Mladjenovic
> > > Cc: gcc-patches@gcc.gnu.org
> > > Subject: Re: [PATCH] [MIPS] Hazard barrier return support
> > >
> > > On Mon, Aug 16, 2021 at 7:43 AM Dragan Mladjen
This patch allows a function to request clearing of all instruction and
execution
hazards upon normal return via __attribute__ ((use_hazard_barrier_return)).
2017-04-25 Prachi Godbole
gcc/
* config/mips/mips.h (machine_function): New variable
use_hazard_barrier_return_p.
> -Original Message-
> From: Andrew Pinski [mailto:pins...@gmail.com]
> Sent: 16 August 2021 21:17
> To: Dragan Mladjenovic
> Cc: gcc-patches@gcc.gnu.org
> Subject: Re: [PATCH] [MIPS] Hazard barrier return support
>
> On Mon, Aug 16, 2021 at 7:43 AM Dragan Mla
Since 'Remove obsolete IRIX 6.5 support' [1] we only use
gp-relative jump-tables for PIC code. We can fall back to
default behaviour for asm_function_rodata_section.
[1] https://gcc.gnu.org/ml/libstdc++/2012-03/msg00067.html
2018-06-04 Dragan Mladjenovic
gcc/
* config/mips/mips.c
2021-08-21 Dragan Mladjenovic
ChangeLog:
* MAINTAINERS: Add myself for write after approval.
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 7b03fc25f4d..b8d5f16f85f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -531,6 +531,7 @@
From: Jeff Law [mailto:jeffreya...@gmail.com]
Sent: 19 August 2021 18:03
To: Dragan Mladjenovic ;
gcc-patches@gcc.gnu.org
Cc: Andrew Pinski
Subject: Re: [PATCH][MIPS] Remove TARGET_ASM_FUNCTION_RODATA_SECTION
> On 8/19/2021 6:11 AM, Dragan Mladjenovic wrote:
> > Since 'Remove obsolete IRIX
Hi all,
This is somewhat a continuation of the previous effort [1] to bring nanoMIPS
support upstream.
We would like to move our toolchain releases [2] to something more closer to
the upstream GCC.
As part of that, we are interested in feedback from the community if the
current approach of
Make parts of the code and options conditional on compile-time defines.
gcc/ChangeLog:
* config/mips/mips.h
(MIPS_SUPPORT_DSP, MIPS_SUPPORT_PS_3D,
MIPS_SUPPORT_MSA, MIPS_SUPPORT_LOONGSON
MIPS_SUPPORT_MICROMIPS, MIPS_SUPPORT_LEGACY
This allows us to choose the different names if needed in the future.
gcc/ChangeLog:
* config/mips/mips.c (mips_print_operand_punctuation):
Handle '&' punctuation.
(mips_output_probe_stack_range): Use '%.' instead of $0.
* config/mips/mips.h
gcc/ChangeLog:
* doc/extend.texi: Add nanoMIPS Function Attributes,
nanoMIPS Built-in Functions and nanoMIPS DSP Built-in Functions.
* doc/invoke.texi: Add nanoMIPS Options.
* doc/md.texi: Add nanoMIPS constraints.
---
gcc/doc/extend.texi | 124 +++
Firstly, the option handling was building suggestions without checking
if an option is disabled. This could have caused other unhelpful
messages for other mistyped options.
Secondly, the key issue here appears to be the lack of CL_JOINED flag
for the false 'Condition' i.e. an option is disabled
gcc/ChangeLog:
* config/mips/mips-dsp.md (mips_bposge):
Output bposgec for TARGET_DSPR3.
* config/mips/mips.c (mips_output_move):
Use $ac0 for $lo if base isa doesn't have md registers.
(mips_option_override) [TARGET_DSPR3]:
Enable TARGET_DSP and
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