section.
Please advice. Thanks a lot.
On 15/8/2020 上午 7:39, Segher Boessenkool wrote:
Hi!
On Fri, Aug 14, 2020 at 03:20:03PM +0800, HAO CHEN GUI wrote:
section *
select_jump_table_section (tree decl)
{
int reloc;
bool section_reloc;
reloc = (! CASE_VECTOR
Segher,
Please ignore the attachments in my last email. My editor cached the old
things. Now they should be correct. Sorry for that.
On 17/8/2020 上午 10:20, HAO CHEN GUI wrote:
Segher,
Seems I sent the wrong diff file. Now the attachments should be
correct ones. Sorry
Segher,
Thanks for your comments. I have modified the patch according to your
advice and committed.
On 24/11/2020 上午 6:25, Segher Boessenkool wrote:
Hi!
Sorry this took so long.
On Thu, Oct 15, 2020 at 04:46:01PM +0800, HAO CHEN GUI wrote:
On 29/9/2020 上午 6:46, Segher Boessenkool wrote
Hi,
This patch adds a new pattern(combine 4 insns to 3 insns) in 4-insn
combine. In the patch, newpat is split twice. The newpat, newi2pat and
newi1pat replace i3, i2 and i1 respectively. The 4 to 3 combine is done
at the end where all former attempts fail. In 4 insn combine pre-check,
the
Segher,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2020-November/560573.html
On 30/11/2020 上午 11:08, HAO CHEN GUI wrote:
Hi,
This patch adds a new pattern(combine 4 insns to 3 insns) in 4-insn
combine. In the patch, newpat is split twice. The newpat, newi2pat
2020-11-13 Haochen Gui
* MAINTAINERS (Write After Approval): add myself
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index a0216185de9..be42e1441ca 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -409,6 +409,7 @@ Matthew Gretton-Dann
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2020-October/556236.html
Thanks.
Gui Haochen
On 6/11/2020 上午 9:02, HAO CHEN GUI wrote:
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2020-October/556236.html
Thanks.
Gui Haochen
On 15/10/2020 下午 4:46
Hi，
I just tweaked the patch according to your advice and committed it.
Thanks so much for your help and advice.
Haochen Gui
On 13/11/2020 下午 5:27, Richard Sandiford wrote:
Hi,
Sorry for the slow reply. Just one minor nit:
HAO CHEN GUI writes:
diff --git a/gcc/varasm.c b/gcc/varasm.c
Hi,
This patch adds a new pattern in 4-insn combine. It supports the
following sign_extend(op: zero_extend, zero_extend) optimization. In the
patch, newpat is split twice. The first split becomes newi1pat and the
second becomes newi2pat. They replace i1, i2 and i3 if all of them can
be
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2020-October/556236.html
Thanks.
Gui Haochen
On 6/11/2020 上午 9:02, HAO CHEN GUI wrote:
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2020-October/556236.html
Thanks.
Gui Haochen
On 15/10/2020 下午 4:46
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2020-October/556744.html
Thanks
Gui Haochen
On 22/10/2020 上午 10:53, HAO CHEN GUI wrote:
I had a wrong email setting and got your reply later. I modified the
patch according to your advice. Could you please review it again
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2020-October/556236.html
Thanks.
Gui Haochen
On 15/10/2020 下午 4:46, HAO CHEN GUI wrote:
Segher,
I re-wrote the patch based on parameterized name.
The attachments are the patch diff file and change log file
Segher,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2020-November/560573.html
Thanks a lot.
On 4/1/2021 上午 10:03, HAO CHEN GUI wrote:
Segher,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2020-November/560573.html
Thanks a lot.
On 11/12/2020 上午 10
Segher,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2020-November/560573.html
Thanks a lot.
On 11/12/2020 上午 10:14, HAO CHEN GUI wrote:
Segher,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2020-November/560573.html
Hi,
This patch tries to optimize PowerPC 64 bit constant generation when
the constant can be transformed from a 32 bit or 16 bit constant by
rotating, shifting and mask AND.
The attachments are the patch diff file and change log file.
Bootstrapped and tested on powerpc64le with no
Alan,
Thanks for your info. Just notice your patch. I will wait for your
patch being reviewed.
On 3/2/2021 上午 10:32, Alan Modra wrote:
On Fri, Jan 29, 2021 at 11:11:23AM +0800, HAO CHEN GUI via Gcc-patches wrote:
This patch tries to optimize PowerPC 64 bit constant generation when
Sorry, forgot to gcc-patches
On 19/5/2021 下午 4:33, HAO CHEN GUI wrote:
Hi,
This patch removes mode promotion of SSA variables on rs6000
platform.
The attachment are the patch diff and change log file.
Bootstrapped and tested on powerppc64le and powerppc64be (with
m32
On 19/5/2021 下午 9:20, Segher Boessenkool wrote:
Hi!
On Wed, May 19, 2021 at 04:36:00PM +0800, HAO CHEN GUI wrote:
On 19/5/2021 下午 4:33, HAO CHEN GUI wrote:
This patch removes mode promotion of SSA variables on rs6000
platform.
It isn't "promotion of SSA variables". At the p
Hi,
The patch removes mode promotion for pseudos on rs6000 target.
The attachments are the patch diff and change log file.
Bootstrapped and tested on powerpc64le-linux and powerpc64-linux
(with both m32 and m64) with no regressions. Is this okay for trunk? Any
recommendations?
Hi,
The patch is preparatory for the patch2 - remove mode promotion for
pseudos.
The attachments are the patch diff and change log file.
Bootstrapped and tested on powerpc64le-linux and powerpc64-linux
(with both m32 and m64) with no regressions. Is this okay for trunk? Any
Hi,
On 20/5/2021 下午 9:08, Segher Boessenkool wrote:
Hi!
On Thu, May 20, 2021 at 04:29:07PM +0800, HAO CHEN GUI wrote:
On 19/5/2021 下午 9:20, Segher Boessenkool wrote:
On Wed, May 19, 2021 at 04:36:00PM +0800, HAO CHEN GUI wrote:
-/* Define this macro if it is advisable to hold scalars
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2021-May/570854.html
Thanks.
On 20/5/2021 下午 5:49, HAO CHEN GUI wrote:
Hi,
The patch removes mode promotion for pseudos on rs6000 target.
The attachments are the patch diff and change log file.
Bootstrapped
Segher,
I committed two patches (r12-1201 and r12-1202) into trunk. Thanks
for your review and advice.
On 4/6/2021 上午 1:36, Segher Boessenkool wrote:
Hi!
On Thu, May 20, 2021 at 05:49:49PM +0800, HAO CHEN GUI wrote:
rs6000 has instructions that can do almost everything 32 bit
Hi,
I refined the patch according to Segher's advice. Is this okay for
trunk? Any recommendations? Thanks a lot.
On 6/7/2021 上午 11:01, HAO CHEN GUI wrote:
Hi,
The patch fixed the wrong "if" fall through in "cstore4"
expand, which causes comparison pattern e
Hi,
The patch fixed the wrong "if" fall through in "cstore4"
expand, which causes comparison pattern expanded twice on P10.
The attachments are the patch diff and change log file.
Bootstrapped and tested on powerpc64le-linux with no regressions.
Is this okay for trunk? Any
Hi
The patch changed matching conditions in pr81384.c and pr56605.c.
The original conditions failed to match due to mode promotion disabled.
The attachments are the patch diff and change log file.
Bootstrapped and tested on powerpc64le-linux with no regressions. Is
this okay for
Hi,
This patch fixes an ICE found by enabling const_anchor for rs6000.
The BLKmode constant rtx is sent to try_const_anchors which causes
assertion failure in try_const_anchors.
The attachment are the patch diff and change log file.
Bootstrapped and tested on powerpc64le with no
Hi,
This patch adds const_anchor for rs6000. The const_anchor is used
in cse pass.
The attachment are the patch diff and change log file.
Bootstrapped and tested on powerpc64le with no regressions. Is this
okay for trunk? Any recommendations? Thanks a lot.
*
15, 2021 at 11:11:32AM +0800, HAO CHEN GUI via Gcc-patches wrote:
This patch adds const_anchor for rs6000. The const_anchor is used
in cse pass.
1) This isn't suitable for stage 4.
2) Please add a test case, which shows what it does, that it is useful.
3) Does this work on other OSes than
David & Segher,
Thanks so much for your explanation. My patch wants to enables the
constant anchor on rs6000 as TARGET_ANCHOR_CONST or targetm.anchor_const
is undefined. I realized that we have addi and addis instructions. So
the range of the offset could be a 32 bit constant.
I put a
Hi
The patch disables gimple fold for float or double vec_min/max
builtin when fast-math is not set. Two test cases are added to verify
the patch.
The attachments are the patch diff and change log file.
Bootstrapped and tested on powerpc64le-linux with no regressions. Is
this okay
oat va = vec_promote (a, PREF_F);
+ vector float vb = vec_promote (b, PREF_F);
+ return vec_extract (vec_min (va, vb), PREF_F);
+}
On 25/8/2021 下午 8:34, Bill Schmidt wrote:
Hi Haochen,
Thanks for the updates! This looks good to me; please await Segher's
response.
Bill
On 8/25/21 2:06 AM, HAO
Hi Kewen,
Thanks for your advice.
On 25/8/2021 下午 3:50, Kewen.Lin wrote:
Hi Haochen,
on 2021/8/25 下午3:06, HAO CHEN GUI via Gcc-patches wrote:
Hi,
I refined the patch according to Bill's advice. I pasted the ChangeLog and
diff file here. If it doesn't work, please let me know. Thanks
8/24/21 3:52 AM, HAO CHEN GUI wrote:
Thanks for this patch! In the future, if you can put your ChangeLog and
patch inline in your post, it makes it easier to review. (Otherwise we
have to manually copy it into our response and manipulate it to look
quoted, etc.)
It is encoded even, making it
On 25/8/2021 下午 4:17, HAO CHEN GUI via Gcc-patches wrote:
Hi Kewen,
Thanks for your advice.
On 25/8/2021 下午 3:50, Kewen.Lin wrote:
Hi Haochen,
on 2021/8/25 下午3:06, HAO CHEN GUI via Gcc-patches wrote:
Hi,
I refined the patch according to Bill's advice. I pasted the
ChangeLog
Hi
The patch optimized expansion for long long or double vec_reve builtin.
Bootstrapped and tested on powerpc64le-linux with no regressions.
Is this okay for trunk? Any recommendations? Thanks a lot.
ChangeLog
2021-09-06 Haochen Gui
gcc/
* config/rs6000/altivec.md
Hi,
The patch optimized the code generation for vec_xl_sext builtin. Now
all the sign extensions are done on VSX registers directly.
Bootstrapped and tested on powerpc64le-linux with no regressions. Is
this okay for trunk? Any recommendations? Thanks a lot.
ChangeLog
2021-09-06
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2021-August/578162.html
Thanks
On 26/8/2021 上午 9:19, HAO CHEN GUI wrote:
Hi Bill,
Thanks for your comments.
Hi Segher,
Here is the ChangeLog and patch diff. Thanks.
2021-08-25 Haochen Gui
gcc/
* config
Hi,
The patch optimized for vec_reve builtin on rs6000. For V2DI and
V2DF, it is implemented by xxswapd on all targets. For V16QI, V8HI, V4SI
and V4SF, it is implemented by quadword byte reverse plus halfword/word
byte reverse when p9_vector is defined.
Bootstrapped and tested on
sd2q\M} 4 } } */
+/* { dg-final { scan-assembler-times {\mvextsb2d\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mvextsh2d\M} 1 } } */
+/* { dg-final { scan-assembler-times {\mvextsw2d\M} 1 } } */
On 10/9/2021 下午 8:18, Bill Schmidt wrote:
On 9/10/21 12:45 AM, HAO CHEN GUI wrote:
Bill,
mes {\mvextsw2d\M} 1 } } */
On 10/9/2021 上午 4:49, Bill Schmidt wrote:
Hi Haochen,
This patch was sent with "format=flowed", so it doesn't apply. That
makes it harder to review. Can you please make sure you disable line
wrap from your patch submissions, at least in the patch part?
On 9
ue, Oct 12, 2021 at 10:59 AM HAO CHEN GUI via Gcc-patches
wrote:
Hi,
This patch disables gimple folding for float or double vec_min/max when
fast-math is not set. It makes vec_min/max conform with the guide.
Bootstrapped and tested on powerpc64le-linux with no regressions. Is this okay
On 13/10/2021 下午 4:29, Richard Biener wrote:
On Wed, Oct 13, 2021 at 9:43 AM HAO CHEN GUI wrote:
Richard,
Thanks so much for your comments.
As far as I know, VSX/altivec min/max instructions don't conform with
C-Sytle Min/Max Macro. The fold converts it to MIN/MAX_EXPR then it has
Hi,
This patch disables gimple folding for float or double vec_min/max when
fast-math is not set. It makes vec_min/max conform with the guide.
Bootstrapped and tested on powerpc64le-linux with no regressions. Is this okay
for trunk? Any recommendations? Thanks a lot.
I re-send the
Hi,
The patch optimizes the code generation for vec_xl_sext builtin. Now all the
sign extensions are done on VSX registers directly.
Bootstrapped and tested on powerpc64le-linux with no regressions. Is this
okay for trunk? Any recommendations? Thanks a lot.
I refined the patch
On 21/10/2021 上午 12:19, Segher Boessenkool wrote:
> Hi!
>
> On Wed, Oct 20, 2021 at 05:04:56PM +0800, HAO CHEN GUI wrote:
>> This patch disables gimple folding for float or double vec_min/max when
>> fast-math is not set. It makes vec_min/max conform with the guid
On 14/10/2021 上午 8:12, Segher Boessenkool wrote:
On Wed, Sep 29, 2021 at 04:32:19PM +0800, HAO CHEN GUI wrote:
The patch punishes reload of alternative pair of "d, Z" for
movsi_internal1. The reload occurs if 'Z' doesn't match and generates an
additional insn. So the memory rel
Hi,
This patch disables gimple folding for float or double vec_min/max when
fast-math is not set. It makes vec_min/max conform with the guide.
Bootstrapped and tested on powerpc64le-linux with no regressions. Is this okay
for trunk? Any recommendations? Thanks a lot.
I refined the patch
Committed as r12-4494. Thanks to all of you.
Gui Haochen
On 15/10/2021 上午 2:53, David Edelsohn wrote:
On Thu, Oct 14, 2021 at 2:17 AM HAO CHEN GUI wrote:
Hi,
The patch optimizes the code generation for vec_xl_sext builtin. Now all
the sign extensions are done on VSX registers directly
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2021-September/579038.html
Thanks
On 8/9/2021 下午 2:42, HAO CHEN GUI wrote:
Hi,
The patch optimized for vec_reve builtin on rs6000. For V2DI and V2DF, it is
implemented by xxswapd on all targets. For V16QI, V8HI, V4SI
Hi,
The patch optimized the code generation for vec_xl_sext builtin. Now all the
sign extensions are done on VSX registers directly.
Bootstrapped and tested on powerpc64le-linux with no regressions. Is this
okay for trunk? Any recommendations? Thanks a lot.
ChangeLog
2021-10-11
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2021-August/578162.html
Thanks
On 22/9/2021 下午 2:52, HAO CHEN GUI wrote:
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2021-August/578162.html
Thanks
On 6/9/2021 下午 2:01, HAO CHEN GUI wrote
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2021-September/580479.html
Thanks
On 29/9/2021 下午 4:32, HAO CHEN GUI wrote:
Hi,
The patch punishes reload of alternative pair of "d, Z" for movsi_internal1.
The reload occurs if 'Z' doesn't match and
Hi,
The patch punishes reload of alternative pair of "d, Z" for movsi_internal1.
The reload occurs if 'Z' doesn't match and generates an additional insn. So the memory
reload should be punished.
Bootstrapped and tested on powerpc64le-linux with no regressions. Is this
okay for trunk? Any
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2021-September/579434.html
Thanks
On 15/9/2021 下午 3:35, HAO CHEN GUI wrote:
Bill,
Yes, I built the gcc with p10 binutils. Then power10_ok tests can pass.
Thanks again for your kindly explanation.
I finally realized
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2021-August/578162.html
Thanks
On 6/9/2021 下午 2:01, HAO CHEN GUI wrote:
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2021-August/578162.html
Thanks
On 26/8/2021 上午 9:19, HAO CHEN GUI wrote:
Hi
Hi,
This patch modifies the combine pattern with a helper -
change_pseudo_and_mask when recog fails.
The helper converts a single pseudo to the pseudo AND with a mask if the outer
operator is IOR/XOR/PLUS
and the inner operator is ASHIFT/LSHIFTRT/AND. The conversion helps match shift
+ ior
Hi,
I modified the patch according to David and Segher's advice.
This patch defines a pattern for mffscrni. If the RN is a constant, it can
call
gen_rs6000_mffscrni directly. The "rs6000-builtin-new.def" defines prototype
for builtin arguments.
The pattern "rs6000_set_fpscr_rn" is then
Hi,
I modified the patch according to reviewers' advice.
This patch defines a pattern for mffscrni. If the RN is a constant, it can
call
gen_rs6000_mffscrni directly. The "rs6000-builtin-new.def" defines prototype
for builtin arguments.
The pattern "rs6000_set_fpscr_rn" is then broken as
Hi,
This patch fixes the ICE in PR100736. It adds a reverse condition comparison
when the
condition code can be reversed and finite-math-only is set.
Bootstrapped and tested on powerpc64-linux BE and LE with no regressions. Is
this okay for trunk?
Any recommendations? Thanks a lot.
Hi Segher,
Thanks for your advice. Please see my explanation below.
On 22/12/2021 上午 1:05, Segher Boessenkool wrote:
> Hi!
>
> On Tue, Dec 21, 2021 at 04:08:06PM +0800, HAO CHEN GUI wrote:
>> This patch defines a pattern for mffscrni. If the RN is a constant,
Bill and David,
Currently, the absolute jump table is not by default enabled. It can be
enabled by undocumented option "-mno-relative-jumptables". If the target
supports named sections (have_named_sections), the feature can be enabled. We
plan to enable the future by default in GCC12 and
Thanks for your review. Committed as r12-5463.
On 22/11/2021 上午 10:56, David Edelsohn wrote:
> On Wed, Nov 17, 2021 at 3:28 AM HAO CHEN GUI wrote:
>> Hi,
>>
>> The patch optimized for vec_reve builtin on rs6000. For V2DI and V2DF, it
>> is implemented by xxswap
Hi,
The patch optimized for vec_reve builtin on rs6000. For V2DI and V2DF, it is
implemented by xxswapd on all targets. For V16QI, V8HI, V4SI and V4SF, it is
implemented by quadword byte reverse plus halfword/word byte reverse when
p9_vector is set.
Bootstrapped and tested on
Hi,
The patch optimizes the code generation for vec_xl_sext builtin. Now all the
sign extensions are done on VSX registers directly.
Bootstrapped and tested on powerpc64le-linux with no regressions. Is this
okay for trunk? Any recommendations? Thanks a lot.
ChangeLog
2021-11-16 Haochen
> :-) I know
> because I needed to make corresponding adjustments to the new builtins code.
>
> Thanks,
> Bill
>
> On 11/15/21 8:16 PM, HAO CHEN GUI wrote:
>> Hi,
>>
>> The patch optimizes the code generation for vec_xl_sext builtin. Now all
>>
ge to rs6000-call.c. I only see the new testcases.
>
> Please resend the complete patch.
>
> Thanks David
>
> On Mon, Nov 1, 2021 at 2:48 AM HAO CHEN GUI wrote:
>> Hi,
>>
>> This patch disables gimple folding for VSX_BUILTIN_XVMINDP,
>> VSX_BUILTIN_XVMA
+float vminf (float a, float b)
+{
+ vector float va = vec_promote (a, PREF_F);
+ vector float vb = vec_promote (b, PREF_F);
+ return vec_extract (vec_min (va, vb), PREF_F);
+}
On 2/11/2021 下午 9:12, David Edelsohn wrote:
> On Mon, Nov 1, 2021 at 10:40 PM HAO CHEN GUI wrote:
>> D
Hi,
This patch disables gimple folding for VSX_BUILTIN_XVMINDP,
VSX_BUILTIN_XVMAXDP, ALTIVEC_BUILTIN_VMINFP and ALTIVEC_BUILTIN_VMAXFP when
fast-math is not set. With the gimple folding is enabled, the four built-ins
will be implemented by c-type instructions - xs[min|max]cdp on P9 and P10
Hi,
This patch modifies the combine pattern with a helper -
change_pseudo_and_mask when recog fails. The helper converts a single pseudo to
the pseudo and with a mask if the outer operator is IOR/XOR/PLUS and the inner
operator is ASHIFT/LSHIFTRT/AND. The conversion helps match shift + ior
Hi,
This patch defines a new split pattern for TI to V1TI move. The pattern
concatenates two subreg:DI of
a TI to a V2DI, then move the V2DI to V1TI. With the pattern, the subreg pass
can do register split for
TI when there is a TI to V1TI move. The patch optimizes one unnecessary "mr"
out
Hi Segher,
Thanks for your advice. Please see my comments.
On 14/12/2021 上午 6:59, Segher Boessenkool wrote:
> Hi!
>
> On Mon, Dec 13, 2021 at 05:22:06PM -0500, David Edelsohn wrote:
>> On Sun, Dec 12, 2021 at 10:00 PM HAO CHEN GUI wrote:
>>> --- a/gcc/config/rs6000/vsx
Hi,
This patch defines a new split pattern for TI to V1TI move. The pattern
concatenates two subreg:DI of
a TI to a V2DI. With the pattern, the subreg pass can do register split for TI
when there is a TI to V1TI
move. The patch optimizes one unnecessary "mr" out on P9. The new test case
Hi,
This patch defines a pattern for mffscrni. If the RN is a constant, it can
call
gen_rs6000_mffscrni directly. The "rs6000-builtin-new.def" defines prototype
for builtin arguments.
The pattern "rs6000_set_fpscr_rn" is then broken as the mode of its argument is
DI while its
corresponding
Kewen,
Many thanks for your comments.
On 2/12/2021 上午 10:21, Kewen.Lin wrote:
> Hi Haochen,
>
> on 2021/12/1 下午5:01, HAO CHEN GUI via Gcc-patches wrote:
>> Hi,
>> This patch modifies the combine pattern with a helper -
>> change_pseudo_and_mask when recog fa
Hi,
This patch modifies the combine pattern with a helper -
change_pseudo_and_mask when recog fails.
The helper converts a single pseudo to the pseudo AND with a mask if the outer
operator is IOR/XOR/PLUS
and the inner operator is ASHIFT/LSHIFTRT/AND. The conversion helps on shift +
ior
Hi Segher,
Thanks for your review. Please see my comments.
On 1/12/2021 上午 2:11, Segher Boessenkool wrote:
> Hi!
>
> On Tue, Nov 30, 2021 at 04:46:34PM +0800, HAO CHEN GUI wrote:
>> This patch modifies the combine pattern with a helper -
>> change_pseudo_and_
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2021-July/575036.html
Thanks
On 13/7/2021 上午 9:38, HAO CHEN GUI wrote:
Hi,
I refined the patch according to Segher's advice. Is this okay for
trunk? Any recommendations? Thanks a lot.
On 6/7/2021 上午 11:01, HAO CHEN
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2021-July/574503.html
Thanks.
On 6/7/2021 上午 11:11, HAO CHEN GUI wrote:
Hi
The patch changed matching conditions in pr81384.c and pr56605.c.
The original conditions failed to match due to mode promotion disabled
Segher,
Thanks for your advice. I tested it. "{ dg-final {
scan-rtl-dump-times {\(compare:CC \((?:and|zero_extend):(?:DI)
\((?:sub)?reg:[SD]I} 1 "combine" } }" works well.
On 22/7/2021 上午 6:51, Segher Boessenkool wrote:
Hi!
On Tue, Jul 06, 2021 at 11:11:05AM +0800
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2021-December/587253.html
Thanks
On 21/12/2021 下午 4:19, HAO CHEN GUI wrote:
> Hi,
> This patch fixes the ICE in PR100736. It adds a reverse condition
> comparison when the
> condition code can be reverse
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2021-December/587051.html
Thanks
On 17/12/2021 上午 9:55, HAO CHEN GUI wrote:
> Hi,
>This patch defines a new split pattern for TI to V1TI move. The pattern
> concatenates two subreg:DI of
> a
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2021-December/586304.html
Thanks
On 7/12/2021 下午 4:28, HAO CHEN GUI wrote:
> Hi,
> This patch modifies the combine pattern with a helper -
> change_pseudo_and_mask when recog fails.
> The helper conve
Hi,
This patch sets "relocatable" of jump table to true when targets require
local relocation to be placed
in a read-write section - bit 0 is set in reloc_rw_mask. Jump tables are in
local relocation, so they
should be placed in RELRO only when both global and local relocation need to be
Segher and David,
Thanks for your explanation. I got it. The "\m" itself is a constraint
escape.
Gui Haochen
On 11/1/2022 上午 9:12, Segher Boessenkool wrote:
> On Mon, Jan 10, 2022 at 06:09:01PM -0500, David Edelsohn wrote:
>> On Sun, Jan 9, 2022 at 10:16 PM
Hi,
This patch enables absolute jump table by default on rs6000. The relative
jump tables are used when
it's explicit set by "rs6000_relative_jumptables",
or jump tables are placed in text section but global relocation is required.
Bootstrapped and tested on powerpc64-linux BE and LE
Hi David,
On 12/1/2022 下午 10:44, David Edelsohn wrote:
> On Wed, Jan 12, 2022 at 7:22 AM HAO CHEN GUI wrote:
>>
>> Hi,
>>This patch enables absolute jump table by default on rs6000. The relative
>> jump tables are used when
>>it's explicit s
Segher,
Thanks for your comments. Here are my comments and questions.Thanks.
On 15/2/2022 上午 5:36, Segher Boessenkool wrote:
> Hi!
>
> On Wed, Feb 09, 2022 at 10:43:17AM +0800, HAO CHEN GUI wrote:
>> This patch removes TImode from mode iterator BOOL_128. Thus, bool
>>
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2022-February/590057.html
Thanks
On 9/2/2022 上午 10:43, HAO CHEN GUI wrote:
> Hi,
> This patch removes TImode from mode iterator BOOL_128. Thus, bool
> operations (AND, IOR, XOR, NOT)
> on TImode will be split to
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2022-January/589006.html
Thanks
On 21/1/2022 下午 5:28, HAO CHEN GUI wrote:
> Hi,
>This patch adds a combine pattern for "CA minus one". As CA only has two
> values (0 or 1), we could conver
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2021-December/587253.html
Thanks
On 10/1/2022 上午 11:14, HAO CHEN GUI wrote:
> Hi,
>
> Gentle ping this:
>
> https://gcc.gnu.org/pipermail/gcc-patches/2021-December/587253.html
>
> Thanks
>
Hi,
This patch adds V1TI mode into a new mode iterator used in vector
comparison expands.With the patch, both built-ins and direct comparison
could generate P10 new V1TI comparison instructions.
Bootstrapped and tested on ppc64 Linux BE and LE with no regressions.
Is this okay for trunk?
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2022-February/590958.html
Thanks
On 28/2/2022 上午 11:17, HAO CHEN GUI wrote:
> Hi,
> This patch corrects the match pattern in pr56605.c. The former pattern
> is wrong and test case fails with GCC11. It should match
Hi,
Gentle ping this:
https://gcc.gnu.org/pipermail/gcc-patches/2022-March/591507.html
Thanks
On 10/3/2022 下午 2:31, HAO CHEN GUI wrote:
> Hi,
>This patch adds V1TI mode into mode iterator used in vector comparison
> expands.With the patch, both built-ins and direct compari
Hi,
This patch adds V1TI mode into mode iterator used in vector comparison
expands.With the patch, both built-ins and direct comparison could generate
P10 new V1TI comparison instructions.
Bootstrapped and tested on ppc64 Linux BE and LE with no regressions. Is
this okay for trunk? Any
Hi,
This patch enables absolute jump tables on PPC AIX and Linux. For AIX, the
jump
table is placed in data section. For Linux, it is placed in RELRO section when
relocation is needed.
Bootstrapped and tested on AIX,Linux BE and LE with no regressions. Is this
okay for trunk?
Any
Hi,
This patch enables absolute jump tables on PPC AIX and Linux. For AIX, the
jump
table is placed in data section. For Linux, it is placed in RELRO section when
relocation is needed.
Bootstrapped and tested on AIX,Linux BE and LE with no regressions. Is this
okay for trunk?
Any
Hi,
On 15/2/2022 下午 10:56, Segher Boessenkool wrote:
> On Tue, Feb 15, 2022 at 11:01:03AM +0800, HAO CHEN GUI wrote:
> Hi!
>
>> On 15/2/2022 上午 5:36, Segher Boessenkool wrote:
>>> On Wed, Feb 09, 2022 at 10:43:17AM +0800, HAO CHEN GUI wrote:
>>> All that are argu
Kewen,
Thanks so much for your advice.
On 21/2/2022 下午 5:42, Kewen.Lin wrote:
> Hi Haochen,
>
> Some minor comments are inlined.
>
> on 2022/2/16 下午4:42, HAO CHEN GUI via Gcc-patches wrote:
>> Hi,
>>This patch enables absolute jump tables on PPC AIX and L
Hi,
This patch corrects the match pattern in pr56605.c. The former pattern
is wrong and test case fails with GCC11. It should match following insn on
each subtarget after mode promotion is disabled. The patch need to be
backported to GCC11.
//gimple
_17 = (unsigned int) _20;
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