Hi Stuart and all,
On Saturday 10 March 2007 03:26, Stuart Brorson wrote:
http://geda.seul.org/gsoc/index.html
If you want to add a project to the suggestions page, please e-mail
me at sdb (*at*) cloud9 (*dot*) net.
I'm currently drafting a better spice integration into gschem. Maybe
that
Hi Werner,
Having read the wiki on Spice improvements I want to share some thoughts
that came to mind.
I'm not a user of Spice or any other simulation program, so take my comments
with the right amount of salt required for good taste ;-)
About probes:
Good idea to implement the
It's great to hear the words yankees and bostonian in the same sentence
:)Go Yankees!!!- Original Message -From: Stuart Brorson Date: Friday,
March 9, 2007 7:01 amSubject: Re: gEDA-user: freedog picturesTo: gEDA user
mailing list Just a couple of photos from tonight's meeting...
I found your thoughts on probes interesting. For about 6 months, I've been
using my own current (Ammeter) meter symbol. I've included it below. It
allows me to easily find the name in KJWaves to include in graphing.
Kurt
Hi Stuart and all,
On Saturday 10 March 2007 03:26, Stuart Brorson
Hi Kurt and all,
On Saturday 10 March 2007 14:56, KURT PETERS wrote:
I found your thoughts on probes interesting. For about 6 months,
I've been using my own current (Ammeter) meter symbol. I've included
it below. It allows me to easily find the name in KJWaves to include
in graphing.
On Sat, 10 Mar 2007 12:24:41 +, carzrgr8-p32f3XyCuykqcZcGjlUOXw wrote:
It's great to hear the words yankees and bostonian in the same
sentence :)Go Yankees!!!- Original Message -From: Stuart Brorson
Date: Friday, March 9, 2007 7:01 amSubject: Re: gEDA-user: freedog
picturesTo:
On Fri, 2007-03-09 at 21:08 -0800, Darrell Harmon wrote:
CORDIC should be able to handle +90 to -90 degrees with no prerotate
stage. With the addition of a 90 degree prerotate stage, the range
becomes -180 to +180 degrees.
This is what the documentation for the Opencores core suggested, but
On Fri, 2007-03-09 at 20:51 -0800, Ben Jackson wrote:
On Sat, Mar 10, 2007 at 04:14:19AM +, Peter Clifton wrote:
In twos complement - for the specific implementation used at least -
which sign extends with the original MSB:
-2 1 == -1
-1 1 == -1
(etc..)
On Fri, 2007-03-09 at 20:55 -0800, Darrell Harmon wrote:
I have written my own CORDIC rotator in Verilog, and accepted the
different results with positive and negative numbers. It does create
some distortion, but it is minimal. I am using mine as a mixer in
a digital down converter at 125
To southerners a Yankee is a northerner who visits the south and a damn
yankee is one who stays
Stuart Brorson wrote:
On Sat, 10 Mar 2007, [EMAIL PROTECTED] wrote:
It's great to hear the words yankees and bostonian in the same
sentence :)Go Yankees!!!
*Chuckle*
Warning -- this is wy
Stuart,
Just some feedback...I loaded your CD of gEDA in both SuSE 10.2 x86 and
SuSE 10.2 x86_64 and it loaded fine. No faults or stopping during the
loading and compiling process. The programs I have tried so far work too.
Anyone on the list using gEDA with a CNC PCB router? If so what
Gary --
Just some feedback...I loaded your CD of gEDA in both SuSE 10.2 x86 and SuSE
10.2 x86_64 and it loaded fine. No faults or stopping during the loading and
compiling process. The programs I have tried so far work too.
Great news! Thanks for the report!
Anyone on the list using gEDA
Ooops! I forgot this one:
Is there a way of grabbing all the gEDA docs and having that local on my
computer. I don't always want to go on line to look up an answer.
If you install from source (e.g. by using the install CD) the docs are
installed under ${install dir}/share/doc/geda-doc.
On Fri, 2007-03-09 at 19:14 -0800, Harry Eaton wrote:
I've fixed the problem in rats.c; Just grab the latest
cvs.
h.
Thanks Harry. I'll have a look at that on Monday morning, if not before.
Seb
___
geda-user mailing list
Hello,
I am trying to redraw the artwork for a 3.1 by 1.65 printed circuit board
in PCB. I am using a background image to help with this process, so I scale
the size of the board in PCB to 3.1x1.64 (which obviously also scales the
background image) and then draw an outline around this picture
To use the background image feature, you must do one of two things:
1. Crop the background image to the exact outlines of the picture of
the board. Then, when you set the PCB board size, the picture
scales to the same PCB size.
2. Crop the background image to some multiple of the picture
On 3/10/07, Gary Fiber [EMAIL PROTECTED] wrote:
Anyone on the list using gEDA with a CNC PCB router? If so what program
are they using to get the Gerber to g code?
I am in process of building a small CNC router, right now its the
Rockcliffmachine.com and possible Crankorgan.corm Brute.
Is
[snip]
Anyone who is thinking of improving a spice GUI has got to try
Linear Technology's free SwitcherCAD (aka ltspice). It's the nicest
spice I've ever used. It's a better schematic entry program than most,
too (and that would include Eagle and gschem).
Okay, I'm confused, why are
On Sat, Mar 10, 2007 at 09:05:19PM -0500, Ales Hvezda wrote:
Okay, I'm confused, why are you trying to use gschem/PCB then?
To make PCBs, of course.
Wouldn't it make sense to use SwitcherCAD (aka ltspice) instead? It does
run under Windows and Linux (using wine).
I do. I'm just
I used method #1, and I also turned off the auto-scaling option in adobe
(whoops). This brings the measurements closer, but I'll need a better
printer, a better ruler, and better eyeballs before I can be sure the
measurements are just right.
To get back to my original question: If I crop the
I used method #1, and I also turned off the auto-scaling option in
adobe (whoops). This brings the measurements closer, but I'll need a
better printer, a better ruler, and better eyeballs before I can be
sure the measurements are just right.
When you get those tools, the calibrate printer
Nested for loops don't seem to work in iverilog.
it would seem that only the inner loop is updated.
Consider the following:
module TestMultiplier;
reg signed [7:0 ] x, y;
wire signed [15:0] z;
initial
begin
$dumpvars;
for (x = -128; x 128; x = x
On 10 Mar 2007, at 9:58:51 PM, [EMAIL PROTECTED] wrote:
Nested for loops don't seem to work in iverilog.
it would seem that only the inner loop is updated.
Consider the following:
module TestMultiplier;
reg signed [7:0 ] x, y;
wire signed [15:0] z;
initial
begin
On Sat, Mar 10, 2007 at 10:11:32PM -0500, [EMAIL PROTECTED] wrote:
Nested for loops don't seem to work in iverilog.
it would seem that only the inner loop is updated.
reg signed [7:0 ] x, y;
for (x = -128; x 128; x = x + 1)
Stop right there. x128 is _always_ true, since
[EMAIL PROTECTED] wrote:
Nested for loops don't seem to work in iverilog.
it would seem that only the inner loop is updated.
Consider the following:
module TestMultiplier;
reg signed [7:0 ] x, y;
wire signed [15:0] z;
initial
begin
$dumpvars;
On 10 Mar 2007, at 10:18:41 PM, [EMAIL PROTECTED] wrote:
On Sat, Mar 10, 2007 at 10:11:32PM -0500, [EMAIL PROTECTED]
wrote:
Nested for loops don't seem to work in iverilog.
it would seem that only the inner loop is updated.
reg signed [7:0 ] x, y;
for (x = -128; x 128; x = x
[EMAIL PROTECTED] wrote:
On Sat, Mar 10, 2007 at 10:11:32PM -0500, [EMAIL PROTECTED] wrote:
Nested for loops don't seem to work in iverilog.
it would seem that only the inner loop is updated.
reg signed [7:0 ] x, y;
for (x = -128; x 128; x = x + 1)
Stop right there. x128
On 10 Mar 2007, at 10:29:47 PM, Stephen Williams wrote:
Look more closely. What is the bit pattern for +128, in 8 bits?
What is the bit patters for -128 in 8 bits? And for extra credit,
what comes after 127 when counting in 8 bits (signed)?
Thank you very much for the response.
Everyone has
On Sat, Mar 10, 2007 at 10:37:11PM -0500, [EMAIL PROTECTED] wrote:
Look more closely. What is the bit pattern for +128, in 8 bits?
What is the bit patters for -128 in 8 bits? And for extra credit,
what comes after 127 when counting in 8 bits (signed)?
Thank you very much for the response.
On Mar 10, 2007, at 6:41 PM, Matthew Sager wrote:
I have been working on a program to convert Gerbers to gcode. So
far it is
not completely working. It should output a good gcode file for
drilling the
vias as long as you have drill bits for all the via sizes that you
used on
the PCB.
On Saturday 10 March 2007 21:05, Ales Hvezda wrote:
Anyone who is thinking of improving a spice GUI has got to
try Linear Technology's free SwitcherCAD (aka ltspice).
It's the nicest spice I've ever used. It's a better
schematic entry program than most, too (and that would
include Eagle
On Saturday 10 March 2007 03:53, Werner Hoch wrote:
I'm currently drafting a better spice integration into
gschem. Maybe that could be a project, too.
http://geda.seul.org/wiki/geda:spice_improvements
Suggestions are welcome.
Gnucap, not spice.
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