On tor, 2007-07-12 at 23:36 -0700, Steven Michalske wrote:
> don't use embedded nets in symbols.
>
> now this is my opinion, but unless you have a tightly controlled
> part library it will be difficult to properly.
>
>
> you can also add a net attribute that will override that one I think...
don't use embedded nets in symbols.
now this is my opinion, but unless you have a tightly controlled
part library it will be difficult to properly.
you can also add a net attribute that will override that one I think...
Steve
On Jul 12, 2007, at 11:31 PM, Jonatan Åkerlind wrote:
> Hi,
>
>
Hi,
have a question regarding embedded power nets in symbols. I have a
design with two separate Vcc voltages (5 and 3.3 V), and one IC powered
by each. Actually the one powered by the 5V is producing the 3.3V (it's
the FTDI FT232RL USB to USART circuit) and the other is an Atmel AVR
ATTINY2313 mic
On Friday 13 July 2007 06:37:29 Ben Jackson wrote:
> I'm looking into a bug I filed (1751566) where I found that if you:
>
> 1. select some things, then
> 2. hide some of them and then
> 3. single click in space (or on an object) to deselect all,
>
> The hidden objects do not get deselected. Th
I'm looking into a bug I filed (1751566) where I found that if you:
1. select some things, then
2. hide some of them and then
3. single click in space (or on an object) to deselect all,
The hidden objects do not get deselected. This turns out to be because
"deselect all" is implemented as "u
Hi DJ,
>I can do the 4th or 5th, and possibly the 19th. The other dates are
>not possible.
The 5th or the 19th are good for me.
-Ales
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> Yes, that's a stupid default,
It's not the default in pcb itself, though. Most likely, it's the
template that gsch2pcb uses, which is obsolete and weirdly configured.
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On Thu, Jul 12, 2007 at 05:48:47PM -0300, Donato Azevedo wrote:
> http://archives.seul.org/geda/user/Nov-2006/msg00225.html and this
> response: http://archives.seul.org/geda/user/Nov-2006/msg00227.html
> which suggested setting the flag lines/arcs clear polygons. All I
> found was Settings->New li
> All I found was Settings->New lines, arcs clear polygon.
That's the setting.
> But that did not work: I had a board already routed
Well, those aren't *new* lines, those are *old* lines.
> and I tried placing a rectangle on the solder layer but it covered
> the routes and all I got was a full
Guys, I have a little doubt regarding filling empty areas of the board.
I read this thread:
http://archives.seul.org/geda/user/Nov-2006/msg00225.html and this
response: http://archives.seul.org/geda/user/Nov-2006/msg00227.html
which suggested setting the flag lines/arcs clear polygons. All I
found
Hi,
I can't join you this time. Enjoy it!
Carlos
> On Wed, 11 Jul 2007, DJ Delorie wrote:
>
> >
> > Looking at my August calendar, I see the following dates open:
> >
> > Sat 4
> > Sun 5
> >
> > Sun 12
> >
> > Sat 18
> > Sun 19
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Here are the xpm files. Pick out what you think is the best. The only
differences are the colors of the arrow. My favourite is Place3.
Greetings, Stefan
<><><>
signature.asc
Description: OpenPGP digital signature
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Hi DJ --
I can do the 4th or 5th, and possibly the 19th. The other dates are
not possible.
Thanks for organizing the sprint!
Stuart
On Wed, 11 Jul 2007, DJ Delorie wrote:
>
> Looking at my August calendar, I see the following dates open:
>
> Sat 4
> Sun 5
>
> Sun 12
>
> Sat 18
> Sun 19
>
>
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