Am Freitag, den 12.12.2008, 21:53 -0500 schrieb al davis:
There is a new development snapshot available ...
http://gnucap.org/devel/gnucap-2008-12-12.tar.gz
Thank you very much.
I tried to compile it inside of my Gentoo-System using an older ebuild
script. (For most software this works.)
Good news for gEDA users!
Please read the below press release, of interest to all gEDA users.
It has gone out to a variety of EE news sources, as well as mainstream
press release sites.
Cheers,
Stuart
December 15th, 2008
gEDA Project and Linux Fund partner to boost gEDA/PCB usability
Help
Very cool. Is there a list of enhancements to be done as pert of this
project?
Steve Meier
On Sun, 2008-12-14 at 17:23 -0500, Stuart Brorson wrote:
Good news for gEDA users!
Please read the below press release, of interest to all gEDA users.
It has gone out to a variety of EE news sources,
Am Sonntag, den 14.12.2008, 23:18 +0100 schrieb Stefan Salewski:
Am Freitag, den 12.12.2008, 21:53 -0500 schrieb al davis:
There is a new development snapshot available ...
http://gnucap.org/devel/gnucap-2008-12-12.tar.gz
Thank you very much.
OK, the problem seems to be that you have
On Sunday 14 December 2008, Stefan Salewski wrote:
So again the question:
Can/shall we change this to -O2 and can we remove the -g?
Probably.
Debugging the spice-wrapper has been a real pain.
You might also want to remove -DTRACE_UNTESTED.
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1. A 0.80mm pitch TSOP? If I have the math right, 0.80 pitch = 31.4
mil. Pin width = 0.375mm, = 14.7 mil. So the clearance between pins is
pinPitch - pinWidth,
= 31.4 - 14.7
= 16.7 mil
Assuming equal line/space, I can fit a maximum trace of 16.7 / 3 = 5.5mil
That assumes my pads are precisely
Steve Meier wrote:
Gene,
My understanding is that the minimum solder mask is dimension is 5 mills
(check with your vendor). So if you have a solder mask cover of 5.5
mills between pad openings then a trace of 4.5 mills or smaller should
not be a problem. I have used traces as small as 3
Hi --
Very cool. Is there a list of enhancements to be done as pert of this
project?
The project statement of work is available from the doc section of
the gEDA wiki here:
http://geda.seul.org/wiki/geda:pcb_funding_sow
This is the original SOW; it may have morphed a little (but probably
not
The tool sees these hierarchical components, but they have no footprint.
So, I get a bunch of warnings to look through. Sure would be nice to
ignore these - is that already possible?
gene
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Gene,
For a 0.8 mm (31.5 mill) pitch device if half the space is for the pad
(16 mills) that leaves (15.5 mills) space between the pads. This is
plenty of room to put a 6 mill width trace through.
For a 0.5 mm (19.7 mill) pitch device if half the space is for the pad
(10 mills) that leaves (9.7
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