Hello there,
I want to know whether it is possible to autogenerate a
report/factory manual from my gEDA schematics and pcbs based on :
- the size of the board
- the BOM
- possible commented bugs or todos on the schematics
- schematic/pcb layout pictures
- ...
I am looking for a possible solution
I want to know whether it is possible to autogenerate a
report/factory manual from my gEDA schematics and pcbs based on :
- the size of the board
- the BOM
- possible commented bugs or todos on the schematics
- schematic/pcb layout pictures
- ...
[... snip ...]
I presume you are talking
H The idea of autocreated fab notes/drawing is a good one. I
could envision doing this using Latex/metafont driven from an external
script. Or maybe via a Makefile? Or doxygen? The script would read
in some type of template holding boilerplate fab notes, insert a .eps
version of
Chitlesh GOORAH wrote:
Currently, I code with ghdl and generate its documentation(pdf) with
doxygen + my latex template, thereby I have an updated documentation
which helps me track the work done and progress made by different
designers. The same documentation I use during my progress
Dan McMahill wrote:
Chitlesh GOORAH wrote:
Currently, I code with ghdl and generate its documentation(pdf) with
doxygen + my latex template, thereby I have an updated documentation
which helps me track the work done and progress made by different
designers. The same documentation I use
DJ,
Wow, i *really* wish that I had known that earlier. No need for some
script if you can just upload the file directly... indeed, i should
have guessed that such functionality existed!
I guess all is not lost, though, as now we have some way of
programmatically interacting with the digikey
Hi Dan and all,
Bert Timmerman wrote:
Dan McMahill wrote:
Chitlesh GOORAH wrote:
Currently, I code with ghdl and generate its documentation(pdf) with
doxygen + my latex template, thereby I have an updated documentation
which helps me track the work done and progress made by different
I'm not sure if anyone is interested, but I have a first cut of program
to move stuff around on the board. It executes directly on the .pcb
file so it's not a plugin. Also, it's in java.
Here's what it does:
1) Selects all the parts that begin with a certain label, e.g. S6/S307
will find
do all the parts need to be dispersed for the rats nest 'o' to work? It
seems that way on my design (3000+ parts). PCB just hangs. If I
disperse all, then 'o', it takes a little while, but it comes back.
gene
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Yeah, it looks like you violated the minimum trace width on the
hairline copper traces between the two pads, and they broke off and
got glued down by the solder mask.
I usually go through all my 0603's and increase the clearance just
enough to not have those slivers.
I don't think it's
DJ Delorie wrote:
I usually go through all my 0603's and increase the clearance just
enough to not have those slivers.
Good idea - one more thing to add to my customized footprint library.
Eric
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Thank you all for the feedbacks. I looked a bit deeper into the
projects and my interests and figured that , I am not into GUI stuff
but would love to get my hands more dirty with things even down.
On Thu, Feb 12, 2009 at 9:56 AM, al davis ad...@freeelectron.net wrote:
3. Porting of missing
Kai-Martin Knaak wrote:
On Sat, 14 Feb 2009 16:05:18 -0700, Eric Brombaugh wrote:
http://members.cox.net/ebrombaugh1/synth/armfpga/gnd_shorts.jpg
Solder mask is offset by a pretty large margin in this sample (~5 mil).
Is this typical for BatchPCB?
Well, I've had mixed luck with
On Sat, Feb 14, 2009 at 06:09:36PM -0500, DJ Delorie wrote:
Yeah, it looks like you violated the minimum trace width on the
hairline copper traces between the two pads, and they broke off and
got glued down by the solder mask.
Yep. If you have an unpopulated board and a stout bench supply
On Sat, 14 Feb 2009 16:27:48 -0800, Ben Jackson wrote:
It's not really a DRC problem. The polygon clearance code should
eliminate slivers when they form. I've thought about how to do it, but
I don't have any ideas that would work well in our dynamic add/remove
setup. It would be pretty
Ben Jackson wrote:
On Sat, Feb 14, 2009 at 06:09:36PM -0500, DJ Delorie wrote:
Yeah, it looks like you violated the minimum trace width on the
hairline copper traces between the two pads, and they broke off and
got glued down by the solder mask.
Yep. If you have an unpopulated board and a
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