Re: gEDA-user: git HEAD PCB now supports user-defined holes in polygons

2010-06-08 Thread kai-martin knaak
Peter Clifton wrote: > I think you might be on my "local_customisation_before_pours" branch, > rather than my "before_pours" branch. I thought I did "git reset --hard origin/before_pours". But may be not. I just fetched, did a reset and compiled at home and did not get the changed zoom behavior

Re: gEDA-user: git HEAD PCB now supports user-defined holes in polygons

2010-06-08 Thread kai-martin knaak
Peter Clifton wrote: > On Tue, 2010-06-08 at 15:34 +0100, Peter TB Brett wrote: > > Scroll as scroll makes sense to me. IMHO, the simplest shortcuts should be mapped to the most frequently used actions. In an editor, or on a web page I hardly zoom. So it makes sense to map it to some modifier-s

Re: gEDA-user: Next problem, PCB looses rats

2010-06-08 Thread kai-martin knaak
Armin Faltl wrote: > If the copper traces have no idea of a net (or vice versa), how does the > positive test work, i.e. why is it possible to connect anything at all > despite there is a DRC? A wild guess in the dark: The algorithm internally builds a list ob objects connected to the currently

Re: gEDA-user: Changing traces from one layer to another

2010-06-08 Thread kai-martin knaak
vinny wrote: > I am working on 2 layer board, 100 small trace need to be moved from > solder side to component side. I can move components but not trace, is > there way to do that? In addition to Richards tip: Type [f] while the mouse hovers over one of the tracks to be moved. All copper connect

Re: gEDA-user: PCB Patches: Use c99 bool instead of manual typedef.

2010-06-08 Thread Robert Spanton
On Tue, 2010-06-08 at 21:17 +0100, Peter Clifton wrote: > Something which has the intelligence to understand the C code as its > patching? (IE.. reference the type directly as a particular type > etc..)? Yep. Seems like the future to me... (when it's done right) > What (if any) kind of tools su

Re: gEDA-user: git HEAD PCB now supports user-defined holes in polygons

2010-06-08 Thread Peter Clifton
On Tue, 2010-06-08 at 13:49 -0700, Ben Jackson wrote: > On Tue, Jun 08, 2010 at 09:25:44PM +0100, Peter Clifton wrote: > > > > I think you might be on my "local_customisation_before_pours" branch, > > rather than my "before_pours" branch. > > If your public repository is also your working copy, u

Re: gEDA-user: git HEAD PCB now supports user-defined holes in polygons

2010-06-08 Thread Ben Jackson
On Tue, Jun 08, 2010 at 09:25:44PM +0100, Peter Clifton wrote: > > I think you might be on my "local_customisation_before_pours" branch, > rather than my "before_pours" branch. If your public repository is also your working copy, users who clone it will start on whatever branch you are in when th

Re: gEDA-user: git HEAD PCB now supports user-defined holes in polygons

2010-06-08 Thread Peter Clifton
On Tue, 2010-06-08 at 15:34 +0100, Peter TB Brett wrote: > On Tue, 8 Jun 2010 12:46:12 + (UTC), Kai-Martin Knaak > wrote: > > > * You moved zoom to [ctrl-wheel]. I know, that this is in line with the > > way other major gnome applications like inkscape handle zoom. However, > > gschem and g

Re: gEDA-user: git HEAD PCB now supports user-defined holes in polygons

2010-06-08 Thread Peter Clifton
On Tue, 2010-06-08 at 12:46 +, Kai-Martin Knaak wrote: > * You moved zoom to [ctrl-wheel]. I know, that this is in line with the > way other major gnome applications like inkscape handle zoom. However, > gschem and gerbv zoom with no modifier by default. I'd strongly vote for > a consistent

Re: gEDA-user: PCB Patches: Use c99 bool instead of manual typedef.

2010-06-08 Thread Peter Clifton
On Tue, 2010-06-08 at 13:19 +0100, Robert Spanton wrote: > Hiya, > > On Sat, 2010-06-05 at 12:44 +0100, Peter Clifton wrote: > > Also - it would appear the changes unintentionally changed some quoted > > strings (caught when attempting to rebase my branches). I'm prepared > > to accept some bugs /

Re: gEDA-user: Segfault on startup and garbage drawn outside of pcb board area

2010-06-08 Thread Peter Clifton
> > LIBGL_ALWAYS_SOFTWARE=1 pcb ... > > This one removes the "garbage". > > > and or > > > > LIBGL_ALWAYS_INDIRECT=1 pcb ... > > This one does not... > You were right - it seems the driver is at fault... It wasn't always > like that so I'll try to track down what change broke the rendering.

Re: gEDA-user: Segfault on startup and garbage drawn outside of pcb board area

2010-06-08 Thread Krzysztof Kościuszkiewicz
On Tue, Jun 08, 2010 at 12:30:46AM +0100, Peter Clifton wrote: > On Tue, 2010-06-08 at 01:05 +0200, Krzysztof Kościuszkiewicz wrote: > > 1) Garbage is displayed outside of board area. > > What graphics card / driver are you using Radeon R300 + Mesa? > This bug is almost certainly going to turn out

Re: gEDA-user: Segfault on startup and garbage drawn outside of pcb board area

2010-06-08 Thread Krzysztof Kościuszkiewicz
On Tue, Jun 08, 2010 at 12:41:50AM +0100, Peter Clifton wrote: > On Tue, 2010-06-08 at 01:05 +0200, Krzysztof Kościuszkiewicz wrote: > > I have noticed two bugs with recent git versions of gl-enabled pcb > > (6507083b0401e0). > > > > 1) Garbage is displayed outside of board area. > > Try this p

Re: gEDA-user: Next problem, PCB looses rats

2010-06-08 Thread Christian Riggenbach
On Tue, 08 Jun 2010 01:13:08 +0200, kai-martin knaak wrote: > DJ Delorie wrote: > >>> ack. The necessity to deactivate auto-DRC is a crutch. Does the internal >>> representation prevent this to be fixed? >> >> Yup. It's based on touch/no-touch tests, not "which net" tests, since >> we don't ass

Re: gEDA-user: Syd Levine Bus Number

2010-06-08 Thread Dave McGuire
On 6/8/10 1:25 PM, Bob Paddock wrote: > Something we all need to consider is what happens to all of our > "stuff" when we depart. > As Syd's picture shows he has a lot of stuff for his family to now dispose of. > I lost my dad not long ago, and have been cleaning out his hamshack of > 50+ years, a

Re: gEDA-user: Syd Levine Bus Number

2010-06-08 Thread Bob Paddock
>> Syd died in his sleep, with no warning of this event in sight. > > > Syd was also one of the most helpful members of the 7x12minilathe > list.   His lab was an inspiration: > http://www.logwell.com/capabilities/lab_pics.html > > Sorry for the thread hijack.  This is sad news. Something we all n

Re: gEDA-user: Syd Levine Bus Number

2010-06-08 Thread Mark Rages
On Tue, Jun 8, 2010 at 11:59 AM, Bob Paddock wrote: > There has been abstract discussions over the years about what happens, > when a key person to a project is lost with no warning. > For a real world example of this, going on right now, follow the > wireline group at Yahoo Groups. > > http://www

gEDA-user: Syd Levine Bus Number

2010-06-08 Thread Bob Paddock
There has been abstract discussions over the years about what happens, when a key person to a project is lost with no warning. For a real world example of this, going on right now, follow the wireline group at Yahoo Groups. http://www.logwell.com/wireline/ http://tech.groups.yahoo.com/group/wireli

Re: gEDA-user: Changing traces from one layer to another

2010-06-08 Thread Richard Barlow
On Tue, 2010-06-08 at 06:12 -0400, vinny wrote: > I can move components but not trace, is there way to do that? Select the traces you want to move and the layer you wish to move them to. Select 'Edit>Move selected to current layer' or press Shift-M. You can also just press M when the cursor is ove

Re: gEDA-user: git HEAD PCB now supports user-defined holes in polygons

2010-06-08 Thread Jim
Kai-Martin Knaak wrote: On Mon, 07 Jun 2010 02:10:57 +0100, Peter Clifton wrote: This is a file format bump, but remains backward compatible with old layouts. I get multiple warnings "unknown flag `polygonholemode'" if I open a new file with the old pcb. I assume, these are benign.

Re: gEDA-user: git HEAD PCB now supports user-defined holes in polygons

2010-06-08 Thread Peter TB Brett
On Tue, 8 Jun 2010 12:46:12 + (UTC), Kai-Martin Knaak wrote: > * You moved zoom to [ctrl-wheel]. I know, that this is in line with the > way other major gnome applications like inkscape handle zoom. However, > gschem and gerbv zoom with no modifier by default. I'd strongly vote for > a con

gEDA-user: Changing traces from one layer to another

2010-06-08 Thread vinny
Hello all, I am working on 2 layer board, 100 small trace need to be moved from solder side to component side. I can move components but not trace, is there way to do that? thank you in advance Vinny ___ geda-user mailing list geda-user@moria.seul.org

Re: gEDA-user: git HEAD PCB now supports user-defined holes in polygons

2010-06-08 Thread Kai-Martin Knaak
On Mon, 07 Jun 2010 02:10:57 +0100, Peter Clifton wrote: >> This is a file format bump, but remains backward compatible with old >> layouts. I get multiple warnings "unknown flag `polygonholemode'" if I open a new file with the old pcb. I assume, these are benign. > I've now rebased my usual b

Re: gEDA-user: PCB Patches: Use c99 bool instead of manual typedef.

2010-06-08 Thread Robert Spanton
Hiya, On Sat, 2010-06-05 at 12:44 +0100, Peter Clifton wrote: > Also - it would appear the changes unintentionally changed some quoted > strings (caught when attempting to rebase my branches). I'm prepared > to accept some bugs / mistakes, but really - we need to be CAREFUL > with mechanised chang

Re: gEDA-user: Next problem, PCB looses rats

2010-06-08 Thread Armin Faltl
If the copper traces have no idea of a net (or vice versa), how does the positive test work, i.e. why is it possible to connect anything at all despite there is a DRC? DJ Delorie wrote: ack. The necessity to deactivate auto-DRC is a crutch. Does the internal representation prevent this to be fix