On Wed, 02 Feb 2011 13:13:16 -0500
David Carr d...@dcarr.org wrote:
Hi all,
Forgive me if this has been asked before, but my searching didn't
uncover a solution:
Here's an image of a board with a component and solder side ground
planes: http://oscar.dcarr.org/tmp/board.png
I'd like
Kovacs Levente wrote:
select the polygon, issue the command
Morphpoly(selected)
Should be
Morphpolygon(selected)
This action replaces the original polygon with independent polygons that
are traced along the margins of the islands the original polygon was
divided into.
According to the
Hi.
Getting used to git I get increasingly unused to cvs. I find myself
typing cvs pull ;-)
A more serious issue is speed. As the repository grows, the processing
times get noticible. Currently, a simple cvs update takes two minutes.
How about git for gedasymbols.org?
(I'd volunteer to
Kai-Martin:
How about git for gedasymbols.org?
(I'd volunteer to modify the instructions to reflect the change)
Yes please, and I'd volunteer to do the conversion.
And while we are at it, why not drop the symbols and footprints from
the programdistribution and just point the programs to
Hello all,
I was wondering if it is possible to add more information to the
fabrication layer output of the gerber export (*.fab).
I like to add the copper thickness for that specific pcb (preferably for
ever layer individually (inner/outer layer)).
Thanks,
Robert.
I'm using Time Tracker (Project Hamster)
http://projecthamster.wordpress.com/
It's a gnome applet. Very easy to use.
Billing I do through the TSV file save output.
Just my $0.02
Robert.
On 02/02/11 14:43, Bob Paddock wrote:
On Sun, Jan 30, 2011 at 7:26 PM, Darryl Gibsonn2d...@gmail.com
On Thu, Feb 3, 2011 at 11:45 AM, Colin D Bennett co...@gibibit.com wrote:
On Thu, 3 Feb 2011 13:51:33 +0100 (CET)
k...@aspodata.se (Karl Hammar) wrote:
Kai-Martin:
How about git for gedasymbols.org?
(I'd volunteer to modify the instructions to reflect the change)
Yes please, and I'd
I have to agree with Mark. Maintaining a hierarchical organization
would be a laborious and thankless job for one poor schmuck. But a
tagging scheme puts most of the burden on individual contributors. I
think it could actually work.
On Thu, Feb 3, 2011 at 11:00 AM, Mark Rages
On Tue, Feb 1, 2011 at 1:39 PM, Mark Rages markra...@gmail.com wrote:
So I'm using my snow day to hack on pcb a little bit, and I need some
help understanding how drawing work on the GTK HID.
I've attached a trivial patch: The intended effect is to draw a XOR
line from the origin to the
On Thu, 3 Feb 2011 11:32:22 -0700
asom...@gmail.com wrote:
I have to agree with Mark. Maintaining a hierarchical organization
would be a laborious and thankless job for one poor schmuck. But a
tagging scheme puts most of the burden on individual contributors. I
think it could actually
More competition from the free-as-in-beer sector for circuit simulation:
http://www.elektor.com/news/free-downloadable-spice-simulator-for-analog.1699331.lynkx
Not sure how closely it's 'tailored' towards ADI though.
/GDE
___
geda-user mailing list
Some recent coverage on DesignSpark (written by the TME for the
product) in the RS house rag here (p24):
http://www.easyflip.co.uk/takeiteasy/rscomponents/eTech_-_Issue_5_UK/enter.html
The section Open Source Design Tools in the middle of p25 is worth
reading if you can put up with the Flash
12 matches
Mail list logo
