On Fri, 13 May 2011 17:43:07 -0700
Colin D Bennett wrote:
> On Sat, 14 May 2011 00:15:26 +0100
> Peter Clifton wrote:
>
> > On Fri, 2011-05-13 at 13:29 -0700, Colin D Bennett wrote:
> >
> > > Very cool! I don't know what I would use a web-based tool for
> > > right now, but I do have to say,
On Sat, 14 May 2011 00:15:26 +0100
Peter Clifton wrote:
> On Fri, 2011-05-13 at 13:29 -0700, Colin D Bennett wrote:
>
> > Very cool! I don't know what I would use a web-based tool for right
> > now, but I do have to say, the rendering of wedana is more beautiful
> > than gschem itself... (thank
On Fri, 2011-05-13 at 23:22 +0300, Павел Таранов wrote:
> Hi,
>I'd like to introduse project Wedana ([1]http://wedana.sf.net), which
>is based on the gEDA file format.
>This project is HTML5 renderer (and editor) for the gEDA file formats.
>Just now it is able to draw most primitive
On Fri, 2011-05-13 at 13:29 -0700, Colin D Bennett wrote:
> Very cool! I don't know what I would use a web-based tool for right
> now, but I do have to say, the rendering of wedana is more beautiful
> than gschem itself... (thanks to antialiasing)
Speaking as the person who put a lot of efort in
On Fri, 2011-05-13 at 11:16 -0700, Ouabache Designworks wrote:
> Would it be useful. Yes
>Would it be easy No.
Indeed not.
I was thinking you would work from the schematic first anyway, so you
make a break where you want it on the schematic, then correct the PCB.
PCB can already verify that
On Fri, 2011-05-13 at 10:17 -0700, Colin D Bennett wrote:
> Agreed, these are some concerns that would have to be worked out.
> Perhaps it would be easier and better to use UTF-32 for internal
> operations, to simplify random access to characters in strings, and
> just use UTF-8 for external stora
On Fri, 2011-05-13 at 11:09 -0600, John Doty wrote:
> In ancient Greek astronomy, when the theory of planetary motion didn't
> fit the data, they added "epicycles". "Layers" have become pcb's
> epicycles: every time somebody wants a "feature", they propose a new
> kind of layer.
FWIW, I'd love to
On Fri, May 13, 2011 at 9:34 AM, Colin D Bennett wrote:
>
> On Fri, 13 May 2011 12:14:45 -0400
> DJ Delorie wrote:
>
> >
> > IIRC my primary objection to the patch-as-was was, "where do we store
> > the TTF files?" PCB has no way to store binary blobs with the board,
> > and if you don't keep th
Hmmm... HTML5 exporter HID for PCB ?
___
geda-user mailing list
geda-user@moria.seul.org
http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
On Fri, 13 May 2011 23:22:34 +0300
Павел Таранов wrote:
> Hi,
> I'd like to introduse project Wedana (http://wedana.sf.net), which is
> based on the gEDA file format.
>
> This project is HTML5 renderer (and editor) for the gEDA file formats.
>
> Just now it is able to draw most primitives avail
Hi,
I'd like to introduse project Wedana ([1]http://wedana.sf.net), which
is based on the gEDA file format.
This project is HTML5 renderer (and editor) for the gEDA file formats.
Just now it is able to draw most primitives availiable in schema files.
So it can be used as client-si
Colin D Bennett wrote:
> Could you elaborate on this footprint generation work-flow?
I am tempted to write a footprint generation howto...
> Are you saying that you draw the footprint pads with lines on
> top/bottom copper layer, pins with vias, and silk with lines,
(*)
> then you
> save a “.
On Fri, 13 May 2011 20:03:15 +0200
Kai-Martin Knaak wrote:
> Kai-Martin Knaak wrote:
> * scripted derivation of footprints from dedicated layouts.
> This is the footprint generation work-flow I currently prefer.
Could you elaborate on this footprint generation work-flow?
Are you saying that yo
Would it be useful. Yes
Would it be easy No.
When you cut a trace you might split a node into two nodes. Or then
again you might not if there is a loop on the PCB. You would need to
extract connectivity from the layout to be sure. The cut on the PCB is
unlikely to map to a nice e
Kai-Martin Knaak wrote:
> Think
> * manual search&replace with a text editor
> * scripted manipulation of components with awk and sed
> * scripted generation of layouts
* scripted derivation of footprints from dedicated layouts.
This is the footprint generation work-flow I currently prefer.
-
Colin D Bennett wrote:
> Can we just store it as BASE64-encoded or something blob for now?
> Yeah, it might take 200 KB+ to store a font, but that's a drop in the
> bucket compared to disk storage capacity these days.
It would be a pain to any workflow that involves edits of the layout
file by a
On Fri, 13 May 2011 17:52:38 +0100
Peter TB Brett wrote:
> On Friday 13 May 2011 17:34:21 Colin D Bennett wrote:
>
> > > Note that it's been mentioned that PCB's internal "text"
> > > representation should switch from ASCII-7 to UTF-8, and I agree.
> >
> > That should be quite simple and painles
On Fri, May 13, 2011 at 09:34:21AM -0700, Colin D Bennett wrote:
>
> That should be quite simple and painless, right? Fully
> backward-compatible.
>
Well, we would need to convert every char* string to
a wchar_t* one; all string functions would need a w
added to them somewhere and string constan
On May 13, 2011, at 7:10 AM, Peter Clifton wrote:
> Hi everyone,
>
> I just thought I'd document this idea in order to get some feedback. I
> have no time to implement it for the foreseeable future, but it might
> provide someone inspiration to get hacking on PCB.
>
> I sometimes find myself wo
On Friday 13 May 2011 17:34:21 Colin D Bennett wrote:
> > Note that it's been mentioned that PCB's internal "text"
> > representation should switch from ASCII-7 to UTF-8, and I agree.
>
> That should be quite simple and painless, right? Fully
> backward-compatible.
*cringe*
Those sound like fam
> That should be quite simple and painless, right?
Go for it :-)
> Fully backward-compatible.
Should be.
___
geda-user mailing list
geda-user@moria.seul.org
http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
On Fri, 13 May 2011 12:14:45 -0400
DJ Delorie wrote:
>
> IIRC my primary objection to the patch-as-was was, "where do we store
> the TTF files?" PCB has no way to store binary blobs with the board,
> and if you don't keep them together you risk someone else getting
> different results. However
IIRC my primary objection to the patch-as-was was, "where do we store
the TTF files?" PCB has no way to store binary blobs with the board,
and if you don't keep them together you risk someone else getting
different results. However, perhaps we could keep both "plain text"
and "TTF text" as diffe
On Fri, 13 May 2011 16:01:08 +
Ineiev wrote:
> On 05/13/2011 01:55 PM, Colin D Bennett wrote:
> > It looked to me like most of the work was done in the patch but it
> > was left to rot!
>
> In fact it was not. I was rebasing it next time few nights ago.
Good to hear.
> > Perhaps the only t
On 05/13/2011 01:55 PM, Colin D Bennett wrote:
It looked to me like most of the work was done in the patch but it was
left to rot!
In fact it was not. I was rebasing it next time few nights ago.
Perhaps the only thing left to be done is to embed the
font files in the .pcb file so that it does
Hi everyone,
Do you use gEDA packages from Ubuntu?
Do you have the latest version of Ubuntu installed?
If so, can I urge you to visit the new and updated "software centre"
application and submit some reviews please? (You will need to sign in).
Open the software centre, find the gEDA applications
On Fri, 2011-05-13 at 06:55 -0700, Colin D Bennett wrote:
> I just ran across an old thread started 2009-03-12 by Ineiev with a
> super cool patch for rendering text with the FreeType library (standard
> TTF/OTF/etc. font support!).
>
> * Subject: PCB: simple FreeType fonts implementation
> From
On Fri, 2011-05-13 at 09:01 -0500, John Griessen wrote:
> On 05/13/2011 08:10 AM, Peter Clifton wrote:
> > Comments?
>
> Sounds close to the approach of Fritzing, where wiring is documented
> as literal wires put in a plug-board. Your concept is different only
> in keeping the as built prototype
On 05/13/2011 08:10 AM, Peter Clifton wrote:
Comments?
Sounds close to the approach of Fritzing, where wiring is documented
as literal wires put in a plug-board. Your concept is different only
in keeping the as built prototype as a reference -- no plug-board.
One step of getting the omitted c
I just ran across an old thread started 2009-03-12 by Ineiev with a
super cool patch for rendering text with the FreeType library (standard
TTF/OTF/etc. font support!).
* Subject: PCB: simple FreeType fonts implementation
From: Ineiev
Date: 2009-03-12 09:32:40 GMT
http://thread.gmane.org/gma
I would definitely use this. I typically maintain a document of all
patches whilst I'm bringing up the PCB for technicians to use then I
use it myself to modify pcb/schematics.
On Fri, May 13, 2011 at 2:10 PM, Peter Clifton wrote:
> Hi everyone,
>
> I just thought I'd document this idea in order
Hi everyone,
I just thought I'd document this idea in order to get some feedback. I
have no time to implement it for the foreseeable future, but it might
provide someone inspiration to get hacking on PCB.
I sometimes find myself working within a particular generation of
prototype board, wanting t
> Packages like Altium (which springs to mind), let you define a layer in
> terms of its _negative_, so you split up a power plane by defining the
> _boundary_ between the two (or more) regions.
Negative layers are great for defining planes, especially when you
want complex splits...and they don't
>> By the way, should the lines of the config files be terminated unix style,
>> or DOS style?
>
> Doesn't make any difference either way.
I did recently pick up a bug with gschem's postscript output and EOL
characters which I must report on launchpad (not related to config
files).
It seems that
> Next step: How do I configure gschem to find my local library?
> On my linux box I have these lines in ~/.gEDA/gafrc :
Look in C:\Users\username\.gEDA
I have my gafrc and gschemrc in there. In gafrc I use the following line,
(component-library-search "d:/Projects/sym")
i.e. / works perfectly
On Fri, May 13, 2011 at 12:04:39AM +0100, Peter Clifton wrote:
> I can't recall exactly why, but I recall being partly opposed to
> Z-ordering within a single layer before. It might be because it would
> tend to produce big diffs in the PCB file for Z-ordering changes.
Once you were opposing to me,
36 matches
Mail list logo
