Copy the cross hair to buffer. During snap let the mouse snap to the
end point of one of the lines. Convert buffer to footprint (from the buffer
menu). The lines will become SMD pads. Paste the buffer back on the cross
hair.
Insert will snap agressively to the center of the pads.
With this
You can use Inkscape to open the Postscript .ps file and then
manipulate the drawing to center it, expand the canvas, etc.
Finally you would export from Inkscape to a .eps file and continue with
pstoedit to export to pcb.
Regards,
Colin
Thanks!
On 01/13/2011 04:57 PM, Kovacs Levente wrote:
I am designing a zigbee interface, and I am using an inverted F antenna
out of PCB pattern. The problem is that the terminals of the antenna
pattern are shorted (well not on 2.4GHz), so I don't have any clue what
to put to the schematic. So far, I
On 08/04/2010 05:54 PM, kai-martin knaak wrote:
c) Rearrange the order of symbols in the file with a text editor.
Downside: laborious.
I know this sounds a silly idea, and I never found similar in any
schematic editor, but wouldn't it be possible to move pins dynamically
on the edge of the
Hi,
I would create a schematic symbol for AT91SAM7 device: 64 pins, lots of
them with multiplexed functions.
1. I can number pins round, 1 to 64 sequentially:
+ easily fit to the schematic, 4x16 pin
+ easy to create the symbol
- no functional grouping
- harder to understand the final
I generally do both variants and put it to gedasymbols, i.e. my AT90USB
symbol and many other.
Yes, but it is a double work:-)
If you make the symbols with tragesym, then
changing pinorder is not much work.
I use (my modified) tragesym. Great tool, pin order really not a matter.
Assigning
Hi,
I have to design a board full of leds and a few additional parts.
I already designed a similar board, but it wasn't necessary to made
schematic, since there was only 2 components excluding leds (one
connector, and a resistor). So I created a script to place the leds
automatically, and
Stefan Salewski wrote:
On Sat, 2010-06-05 at 19:45 +0200, Tamas Szabo wrote:
Hi,
I have to design a board full of leds and a few additional parts.
I already designed a similar board, but it wasn't necessary to made
schematic, since there was only 2 components excluding leds (one
connector
By the way what 'File order' means?
This is just the order in which the parts are in the schematic file and
in the internal object structure.
It's basicaly the placement order of the components into the schematic.
Thx.
___
geda-user mailing
I think all of you can feel that putting 600+ leds to schematic and
changing refdes manually is a _little bit_ boring:-) (And takes quite
long time.)
Try JCL's code. I got it to work OK.
http://www.luciani.org/geda/util/matrix/index.html
John
Wow! It's great!
/sza2
Christoph Lechner wrote:
When I enable thin draw poly mode, the outline of the polygon shown is
just as I want it to be. If pcb would fill only the region within the
contour, there would be no problem.
Ok, this it not he solution, but for me, if I remove R1 and X1 the
problem disappear. Did
Jared Casper wrote:
On Thu, May 13, 2010 at 8:25 AM, kai-martin knaak k...@familieknaak.de wrote:
Getting a GPS location when at an unknown position consumes a fair amount of
computational power (to find the satellites). So this is a modified proposal
for less energy consumption: Just check for
kai-martin knaak wrote:
Tamas Szabo wrote:
Well, I plan to use my own vehicle tracking module with SIM508
Just skipped through the hardware specification --- Wow! What a wealth of
features in such a tiny package. GPS, GSM and a TCP/IP stack, too. This is
true technology magic.
My bike
kai-martin knaak wrote:
Tamas Szabo wrote:
Currently I make a footprint for an Amphenol SIMLOCK adapter
You are building your own mobile phone!
That's a cool project.
---)kaimartin(---
___
geda-user mailing list
geda-user@moria.seul.org
http
Hi,
Currently I make a footprint for an Amphenol SIMLOCK adapter
(http://www.amphenol.de/downloads/C707_10M006_500_2.pdf) and there are a
few area where copper/wires not allowed.
My best idea is, that I do it by pads which have a zero width and a
specified clearance. Unfortunately, those
John Luciani wrote:
On Mon, May 3, 2010 at 12:12 PM, Tamas Szabo sza2k...@freemail.hu wrote:
My best idea is, that I do it by pads which have a zero width and a
specified clearance. Unfortunately, those will have a rounded corner, so
rectangular corner seems impossible (I can reduce the radius
John Luciani wrote:
On Mon, May 3, 2010 at 12:49 PM, Tamas Szabo sza2k...@freemail.hu wrote:
John Luciani wrote:
On Mon, May 3, 2010 at 12:12 PM, Tamas Szabo sza2k...@freemail.hu wrote:
My best idea is, that I do it by pads which have a zero width and a
specified clearance. Unfortunately
Hi,
I would like to create a footprint similar to the one in the attachment.
It is like a square pad intersect by a circle.
Is there a way to do?
Thanks,
/sza2
inline: molex.png
___
geda-user mailing list
geda-user@moria.seul.org
Thanks!
Anyway, is there any plan to extend footprint by creation of arbitrary
shapes in the future?
/sza2
DJ Delorie wrote:
The only way is to esimate the arc with angled segments.
Element[0 0 0 0 0 100 ]
(
Pad[-2500 -2500 2500 2500 3500 2000 5500 1 ]
Pad[-2500 -2500
Thanks!
I tried it, and seem great.
Anyway isn't it a problem that which pad is on the top of another one?
/sza2
DJ Delorie wrote:
Use two pads for each side - one big one for the overall shape
(mask==0) and a smaller one on top of that to define the exposed area
(mask==whatever).
Element[
Hi,
John Griessen wrote:
So, is it open hardware licensed? Can we see?
So finally I had time to test this board. Actually it is a truly simple
board. it has all the components which are necessary to operate (but
nothing else) - only need to connect power and peripherals if any.
I have no
John Griessen wrote:
SZABO Tamas wrote:
Hello All,
Sorry for this off-topic post (not fully off, I designed the board with the
gEDA suite:-),
So, is it open hardware licensed? Can we see?
Sure, after I tested it I can distribute it. But this is really simple,
based on the application
John Griessen wrote:
Tamas Szabo wrote:
I also checked TinyOS. There are working parts for CC2430 AFAIK (Since
CC2430 and CC2480 are pin compatible, both applicable on the board). I
thought start with CC2480 is easier...
CC2430 is just a 8051 microcontroller, so its port of TinyOS
Hi,
I want to design a small ZigBee board with integrated PCB antanna. I
already made it, however I have a problem. Since all part of the antenna
lines consist of pads, it seems to be a short circuit between the
terminals - ie. it always has an orange color.
Is there a way to workaround
Dave N6NZ wrote:
John Griessen wrote:
Tamas Szabo wrote:
Since all part of the antenna
lines consist of pads, it seems to be a short circuit between the
terminals
Another thing to explore is about how in PCB pads
aren't handled just the
same DRC-wise as lines and no lines are
allowed
Hello,
I found some hint in the land patterns tutorial about the meaning of
flags for pad shape. But I realized the following:
0x0100 - square (match with .pdf)
0x0900 - square (I found in a QFN package footprint) what shape should
it be?
0x - rounded (match with .pdf)
0x0800 - rounded
DJ Delorie wrote:
0x0100 - square (match with .pdf)
0x0900 - square (I found in a QFN package footprint) what shape should
it be?
0x - rounded (match with .pdf)
0x0800 - rounded (the .pdf says: octogon)
http://pcb.gpleda.org/pcb-cvs/pcb.html#Object-Flags
Thanks!
0x0100 - square
+1
Stefan Kowalewski wrote:
Is this really a good idea?
Sure, sometimes on this list is much traffic -- seems that Joerg can
type very fast, but he seems writing somewhere else now. Sometimes we
have off-topic postings...And we have user and developer discussion
mixed. One solution:
Hi,
Can I make a pin without plating and put the footprint only to the
component side? If yes, how can I do it?
Thanks,
/sza2
___
geda-user mailing list
geda-user@moria.seul.org
http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
John Luciani wrote:
On Mon, Jun 1, 2009 at 8:35 AM, Tamas Szabo [1]sza2k...@freemail.hu
wrote:
Hi,
Can I make a pin without plating and put the footprint only to the
component side? If yes, how can I do it?
It sounds like you want a copper ring with an unplated
Hi,
Maybe off-topic a bit...
I just recieved an Avnet Spartan-3A Evaluation Kit. It has the above
mentioned interface for downloading configuration. I only found Win
based software for it.
Has anyone any experience with it under Linux?
Thanks,
/sza2
DJ Delorie wrote:
I have not already used their WebPack for Linux, but I am sure it
works.
I use WebPack for Linux, it works just fine. Although, I don't use
any of their programming cables.
___
geda-user mailing list
Hello All,
Sorry, I know this question is a bit silly (and maybe off-topic).
I have been designed an IrDA interface. It works correctly if I connect
for example 2 minicom terminal. However I need to communicate with a
device, which echoes back all characters, but too fast - so the host
side
Ben Jackson wrote:
On Mon, Feb 23, 2009 at 08:05:03PM +0100, Tamas Szabo wrote:
I have been designed an IrDA interface. It works correctly if I connect
for example 2 minicom terminal. However I need to communicate with a
device, which echoes back all characters, but too fast - so the host
Ethan Swint wrote:
Old issue (http://archives.seul.org/geda/user/Aug-2007/msg00133.html) I
encountered just today when trying to build code pulled today from CVS.
Can the hack to enable successful compilation be added to the README
and/or the INSTALL document, is it in there and I didn't
Tamas Szabo wrote:
Ethan Swint wrote:
Old issue (http://archives.seul.org/geda/user/Aug-2007/msg00133.html) I
encountered just today when trying to build code pulled today from CVS.
Can the hack to enable successful compilation be added to the README
and/or the INSTALL document
Thank you for the exhaustive answer!
/sza2
John Doty wrote:
No, but there are lots of ways to do this. In some designs, I have a
gain adjustment resistor. In most cases it should be left out, so it
has value=omit. Something like value=330, not mounted is
perfectly legal from the
I'm using a pcb mounted RJ45 connector. The component, as I'm sure
everyone knows, has metal mounting tabs. I was wondering how pcb
companies like [1]4pcb.com handle these holes since they're not just
round holes. Are they OK with getting boards like this? Has anyone
used a
Ben Jackson wrote:
On Mon, Jan 12, 2009 at 07:35:52PM +0100, Tamas Szabo wrote:
Well OK, mine is a dirty solution, but I made it using a few holes close
to each other, about 1/3 diameter distance.
Most fabs won't allow that. They will specify a minimum drill-drill
distance
Do you have installed the -dev packages (libgtk2.0-dev)?
/sza2
vsrk sarma wrote:
I tried to install on my nx6115 laptop AMD64 loaded with Ubuntu 8.10.
It throws up following error:
checking pkg-config is at least version 0.9.0... yes
checking for GTK24... no
configure: error:
Great! I want this! :-)
Stefan Salewski wrote:
I have just uploaded some schematics (nearly, but not fully finished)
for a plain PC-based Digital Storage Oscilloscope (DSO) to my homepage:
http://www.ssalewski.de/DAD.html.en
It's not very useful in its current state, but at least it's an
Hi,
Can anyone tell me the exact purpose of locking a part? First I thought
it is used to keep the part from accidental move.
Thx,
/sza2
___
geda-user mailing list
geda-user@moria.seul.org
http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
Yes, my idea was absolutely the same. I put all the parts which never
will be moved, then I locked those. However if I lock a component,
'Crosshair snaps to pins and pads' become unusable. Using thermal also
not works...
Is it normal behavior? If yes, why?
/sza2
DJ Delorie wrote:
Can anyone
Ian Chapman wrote:
Is it normal behavior? If yes, why?
Normal, but perhaps not ideal.
That's what I have found from using pcb. I also noted looking at the pcb
file with a basic editor gedit that there was a lock on the component and
a lock on each pin. Maybe that's a nerve end for
Finally: I turn off locking till placing wires then turn it back on:-)
However if someone could fix it...
DJ Delorie wrote:
A pin can be changed - the pad, drill, mask, and clearance sizes can
change, as well as the pin shape, name, etc.
It can't be moved though.
Hi,
It seems, it is not possible to toggle thermal property in case the
footprint is locked. Is this the normal behavior? Can I change it?
Thanks,
/sza2
___
geda-user mailing list
geda-user@moria.seul.org
Hi,
I checked it, well, I found some issues, however these are not affect
the design with this symbol I think:
- refdes usually red (I did not design such application with optocoupler
but I feel I would use U? instead of ISO?)
- pinlabel and attributes may seems better in yellow
- pins are
See below
/sza2
Csányi Pál wrote:
[EMAIL PROTECTED] (Csányi Pál)
writes:
I made a symbol with djboxsym and gschem for dual phototransistor
optocoupler.
What do you think about it?
I made some changes on the symbol and checked it out with gsymcheck
and get the following warning
Csányi Pál wrote:
Tamas Szabo [EMAIL PROTECTED] writes:
I checked it, well, I found some issues, however these are not affect
the design with this symbol I think:
Thank you!
- refdes usually red (I did not design such application with optocoupler
but I feel I would use U? instead
Definitely:-) Mine is 1.4.0.20080127
However I wonder why this feature is missing... This is basic.
/sza2
Csányi Pál wrote:
Tamas Szabo [EMAIL PROTECTED] writes:
Csányi Pál wrote:
Tamas Szabo [EMAIL PROTECTED] writes:
- pinlabel and attributes may seems better in yellow
I didn't
Hello All,
I would like to place a connector to the PCB but I'm unable to put it to
the right position, since no part of the connector can be over the board
outline specified in preferences. I realized it earlier but now it
became significant.
Is there a way to workaround it? (Not counting
Thanks!
DJ Delorie wrote:
Not counting the possibility to specify the board size bigger and
creating an outline inside it. Or should be the solution is this?
That's exactly what you do. Name one spare layer outline and draw
your board outline there. That's also how you get non-rectangular
Hi,
I just checked the footprint in newlib and found that in lot of the
cases pin 1 of a part is placed to (0,0).
Is there any drawback if I put it somewhere else due to make the
calculation easier?
I mean, for example, selecting one corner of the outline of a module
built on a small pcb
Hi,
You didn't described your project too much...
However, if you never worked with SMT and you want only a few parts, it
would be far more easy to solder by soldering iron.
If you want something pretty, you need a so called 'stencil', which is a
stainless steel mask for the soldering paste.
Dear All,
Nowadays I find lot of datasheets, in which the dimensions are appear
only in metric system. I don't know whether any of you interested in
creating footprints in mm instead of mil or mil/100, but it was a
nightmare for me to calculate every value from metric to English units.
So I
DJ Delorie wrote:
So I made a really simple patch of parse_y.y, by which I can use um
(micrometer) to specify the items. The format is same as in [ ] case
but the specifier is and . All the other thing is the same.
Please, no more syntax determines content patches. If you want um,
let
Kai-Martin Knaak wrote:
I am curious, just how heterogeneous the group of geda users and
developers is. So I thought, I'd start this little non-random sample poll
in the mailing list:
* What OS do you run geda applications on?
Debian Ethch
* How did you install your copy of geda apps?
Ben Jackson wrote:
On Tue, Apr 29, 2008 at 12:19:55AM -0400, DJ Delorie wrote:
io.pcb
3594,2241
component side
Ok, I see it now. There's a 45 degree line segment near 'U303' (the text)
which is two segments. The polygon code is not happy about that. If you
make it one continuous
Hi,
Is there a way to see how a line built from segments? I mean some kind
of 'wireframe' mode (not thin draw mode).
Furthermore, is there a tool, command or menu item to combine straight
lines of more segments into one segment line?
Currently I use v1.99x (latest cvs checkout)
Thx in
Ben Jackson wrote:
On Mon, Apr 28, 2008 at 07:46:17PM +0200, Tamas Szabo wrote:
Is there a way to see how a line built from segments? I mean some kind
of 'wireframe' mode (not thin draw mode).
I think you can see it in thindraw as a circle at the segment overlap.
Well, it seems not working
DJ Delorie wrote:
Is there a way to see how a line built from segments? I mean some kind
of 'wireframe' mode (not thin draw mode).
What I do is select the line. If it's made of multiple segments, only
one is selected.
Ok, but for me there are a lot of... So I need to click on every line
Ben Jackson wrote:
On Mon, Apr 28, 2008 at 07:46:17PM +0200, Tamas Szabo wrote:
Is there a way to see how a line built from segments? I mean some kind
of 'wireframe' mode (not thin draw mode).
I think you can see it in thindraw as a circle at the segment overlap.
Furthermore
Hello,
Could anyone help me?
I have two identical size board with identical coords for mounting holes.
http://web.t-online.hu/sza2webacces/gEDA/control.pcb
http://web.t-online.hu/sza2webacces/gEDA/io.pcb
The latter one have a strange behavior. The most problematic that some
of the lines not
DJ Delorie wrote:
The latter one have a strange behavior. The most problematic that some
of the lines not clears the rectangle used for filling the unused area
by copper. Unfortunately DRC does not show any error or warning although
there a many short circuit due to the rectangle.
Looks
DJ Delorie wrote:
The latter one have a strange behavior. The most problematic that some
of the lines not clears the rectangle used for filling the unused area
by copper. Unfortunately DRC does not show any error or warning although
there a many short circuit due to the rectangle.
Looks
Well, am I feel right, that footprint definition possibilities are so
limited? Would have any drawback of defining every shape as polygon
(copper, solder mask, clearance, etc - even the holes)?
/sza2
Dave N6NZ wrote:
Is there a way to clear an area of solder mask other then defining a
Hi,
It may not usual, but sometimes it is necessary to design special parts
(for example in case of mechanical part necessary to fix by soldering).
I attached a picture, but I'm not sure it is accepted by the mailing
list system.
Is there a way create footprint like this?
/sza2
inline:
And will the drilling correct? I mean L-shape.
DJ Delorie wrote:
You are allowed to have two overlapping pads with the same
name/number. PCB treats them as one pad.
___
geda-user mailing list
geda-user@moria.seul.org
Sorry, I forget to mention it is a hole part.
John Luciani wrote:
On Wed, Mar 19, 2008 at 3:24 PM, Tamas Szabo [EMAIL PROTECTED] wrote:
And will the drilling correct? I mean L-shape.
You can make the L-shape with overlapping pads.
I did not see any drillholes in your picture but you can
Hello,
I found that sometimes very hard (impossible?) to catch and move the
name of the part.
Is there a way to select and move the name in those cases?
I'm using 1.99w (Compiled on Jan 15 2008 at 22:12:40).
Thx,
/sza2
___
geda-user mailing list
DJ Delorie wrote:
Is there a way to select and move the name in those cases?
Check the only names option (it's in the view menu for lesstif,
settings for gtk) and set the grid to none.
Well, unfortunately I can't see any differences... (except the parts are
not movable) :-(
/sza2
!!!
Just one question: why?
/sza2
epswint wrote:
I found that I can't move the refdes if it is selected - I can only move
a refdes if it is *not* selected and I click, hold, and drag.
-ES
John Luciani wrote:
On Fri, Mar 7, 2008 at 6:18 PM, Tamas Szabo [EMAIL PROTECTED] wrote:
DJ
Hi All,
Unfortunately pcb gives only a line number if it finds any error in an
.fp file.
It is not a serious problem, but sometimes makes textual edited
footprints hard to debug.
Is there a way to extract a bit detailed info about the item which the
error caused by?
Thx,
/sza2
for the slot, and a second symbol for the power
connections. Simply give all instances the same refdes.
Tamas Szabo wrote:
Hello,
Can anybody guide me how to connect power pins of slotted devices like
TL082 and similar? There is power pins for every slot. Should I connect
all
Hello,
Can anybody guide me how to connect power pins of slotted devices like
TL082 and similar? There is power pins for every slot. Should I connect
all of it?
If I connect only one +/- and run gnetlist -g drc2 lists errors due to
unconnected pins.
Is there a way to solve this?
Thx
/sza2
Hi Peter,
I also use gschem 1.4.0.20080127 and did not realized the problem you
mentioned. I placed a few slotted part to the sheet; the default
attributes are device, refdes and footprint for those I tried; when I
add slot attribute and change the value the pin numbers change
immediately,
if you find anything usable from my code, so do it
as you wish.
BRGDS,
/sza2
Werner Hoch wrote:
Hi Tamas,
On Sonntag, 30. Dezember 2007, Tamas Szabo wrote:
I was modifying tragesym, as it was not exactly suitable for me.
I'm a lazy guy, so the only doc is the soft itself (with a few
Hi All,
I was modifying tragesym, as it was not exactly suitable for me.
I'm a lazy guy, so the only doc is the soft itself (with a few comments)
If any of you interested in, just pick it up from:
http://web.t-online.hu/sza2webacces/gEDA/tragesym_sza2.tar.gz
It also contains a few sym I made.
Hi Nate,
This is not a one step solution, you may already tried, but...
Print all the pages separately. Than:
cat MySchematic-1.ps MySchematic-2.ps MySchematic-3.ps MySchematic.ps
ps2pdf MySchematic.ps
pdf2ps MySchematic.pdf
I do not know why ps-pdf-ps conversion is necessary, but without it
Hi All,
I'm a newbie user of Pcb (and may gEDA also...). I compiled pcb-20070912
snapshot today and pcb-20070208 snapshot earlier. I tried to follow the
pcb.pdf guide. The different snapshots contains different pcb.pdf files,
however I realized that there is many part where the guide cannot
80 matches
Mail list logo