Jorge Juan 写道: > Hi, > I teach a basic digital circuit design curse at the university for > first-year students. I plan to incorporate HDL, behavioral > descriptions, simulation and logic optimization next year. > I find Icarus Verilog plus gtkwave and the rest of GEDA tools ideal > for the task, but cant find a way to do logic optimization within the > geda framework. The icarus 0.8.x README tells logic optimization can > be enabled through the "-F" option, but it is not documented in the > man page. Logic synthesis to edif works fine but optimization is not > applied. > Some simple optimization targeting basic logic (AND, OR, NOT) would be > ideal for me. Integration in Icarus would be perfect. > Do you know of available options within geda or free software. > Thanks. > -- > Jorge Juan > > > ------------------------------------------------------------------------ > > > > _______________________________________________ > geda-user mailing list > geda-user@moria.seul.org > http://www.seul.org/cgi-bin/mailman/listinfo/geda-user > Hi, Jorge,
Icarus does have codes for quite simple logic optimizations like constant propagation, switch logic optimization. But, based on my experience, some of those codes are not enabled in 0.8.x packages. You can try the latest 0.9.x ones. For the open source logic optimization tools, besides expresso mentioned by Chitlesh, you can also have a look on MVSIS. http://embedded.eecs.berkeley.edu/Respep/Research/mvsis/ Regards Yujie _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user