Re: gEDA-user: OT: help needed; asymmetric load after rectifier seems to disrupt its working.

2011-06-30 Thread Andy Fierman
Good point Rick, I should have explained that even though the larger inductance reduces the rms current in the primary significantly, the positive and negative peak currents are highly asymmetric. Simulating with a sinewave input, the positive peak current is about 110mA whilst the negative is

Re: gEDA-user: OT: help needed; asymmetric load after rectifier seems to disrupt its working.

2011-06-30 Thread rickman
It's also hard to see how the circuit could work with C1 in series with the transformer current. Why is a capacitor needed if you use the transformer? Maybe there is some effect that will balance things out, but if the two currents are unequal, actually it would be the integral of the two

Re: gEDA-user: OT: help needed; asymmetric load after rectifier seems to disrupt its working.

2011-06-29 Thread rickman
The transformer allows a DC path to exist on the secondary side, but you still have the capacitor on the primary side of the circuit. If the positive and negative pulse currents are not equal, you will still have a problem on the primary side. You need to remove the cap C1. I

Re: gEDA-user: OT: help needed; asymmetric load after rectifier seems to disrupt its working.

2011-06-27 Thread Andy Fierman
The most recent circuit you posted is not the same as your original and as Gene pointed out, you have now made a series resonant circuit between the 220nF cap and the 200uH primary inductance. In the simulation, the source resistance is zero, the ESR of the cap is zero and there is only 0.25R

Re: gEDA-user: OT: help needed; asymmetric load after rectifier seems to disrupt its working.

2011-06-26 Thread Wojciech Kazubski
Dnia piątek 24 czerwca 2011 o 13:10:35 myken napisał(a): This is strange in my simulation the attached circuit works fine. In real life it kinda works but the signals are distorted like you can see. I think that has something to do with the fact we used a pulse transformer to try the circuit.

Re: gEDA-user: OT: help needed; asymmetric load after rectifier seems to disrupt its working.

2011-06-25 Thread gene glick
On 06/24/2011 07:10 AM, myken wrote: This is strange in my simulation the attached circuit works fine. In real life it kinda works but the signals are distorted like you can see. I think that has something to do with the fact we used a pulse transformer to try the circuit. If we

Re: gEDA-user: OT: help needed; asymmetric load after rectifier seems to disrupt its working.

2011-06-24 Thread myken
Vcc and Vss are still sensitive to load. So if the design requires both Vss and Vee be equal and opposite, then it needs regulation - zener, for example. Your absolutely right, but that's what comes next. It is the regulators how create the difference in load balance.

Re: gEDA-user: OT: help needed; asymmetric load after rectifier seems to disrupt its working.

2011-06-24 Thread John Griessen
On 06/24/2011 06:10 AM, myken wrote: I think that has something to do with the fact we used a pulse transformer to try the circuit. Looks like a diode drop to me, not transformer problems. You've got a series chain of reactances. You're gonna get oscillations and lagging, leading voltage

Re: gEDA-user: OT: help needed; asymmetric load after rectifier seems to disrupt its working.

2011-06-22 Thread gene glick
On 06/22/2011 04:39 PM, Andy Fierman wrote: Vcc and Vss are still sensitive to load. So if the design requires both Vss and Vee be equal and opposite, then it needs regulation - zener, for example. ___ geda-user mailing list

Re: gEDA-user: OT: help needed; asymmetric load after rectifier seems to disrupt its working.

2011-06-21 Thread Wojciech Kazubski
Hello all, I would appreciate some expert advice. I have a system which rectifies a sine wave input signal of 20Khz after a LC filter (see Rectifier_sim.jpeg) Everything works fine if LOAD_1 and LOAD_2 are equal. Vx is then (almost) the same as Vin. And Vcc and Vss are equal to the

Re: gEDA-user: OT: help needed; asymmetric load after rectifier seems to disrupt its working.

2011-06-19 Thread Andy Fierman
Ooops, Just missed the Undo Send window ... Typo in (i): if the source has a peak to peak swing of x volts but a dc offset of y then (neglecting the diode drops) vcc = x/2+y and vss = x/2-y. :)          Andy On 19 June 2011 11:01, Andy Fierman andyfier...@signality.co.uk wrote: Rick is

Re: gEDA-user: OT: help needed; asymmetric load after rectifier seems to disrupt its working.

2011-06-19 Thread myken
Hello all, As a remark on your observation Andy I would like to say in my defence that I simplified and reduced the problem/information simply to avoid wasting anyone’s time with details and (in my opinion) irrelevant side effects. That the two load resistors are in fact a representation of two

Re: gEDA-user: OT: help needed; asymmetric load after rectifier seems to disrupt its working.

2011-06-18 Thread rickman
What is the purpose of C1 and L1? If you want to filter anything, it should be AFTER you rectify the signal to DC. A series cap is going to remove low frequencies... like DC which is attenuated very highly. So much in fact that you can't draw a DC signal through a capacitor. That is why

Re: gEDA-user: OT: help needed; asymmetric load after rectifier seems to disrupt its working.

2011-06-17 Thread myken
Yeap, it should be a very low power power supply. Vx is not important Vcc and Vss are. Vin can be anything from 15Khz to 28Khz so a transformer is not the most desired option. I have designed two SMPS for Vcc and Vss but there load to the rectifier are not the same, with the described result.

Re: gEDA-user: OT: help needed; asymmetric load after rectifier seems to disrupt its working.

2011-06-17 Thread Andy Fierman
Simply reproducing the filter twice, one for each polarity of rectifier will not work. If you can float the load or the source then splitting the circuit into two and using a bridge rectifier in each will work OK. The attached shows what I mean. Cheers,          Andy. www.signality.co.uk

Re: gEDA-user: OT: help needed; asymmetric load after rectifier seems to disrupt its working.

2011-06-17 Thread gene glick
On 06/16/2011 02:30 PM, myken wrote: Hello all, I would appreciate some expert advice. Are you trying to make a low current power supply? I agree with DJ - the unequal loading on + and - cycle will average to something other than zero (unequal capacitors, unequal diodes, etc) If Vx must

Re: gEDA-user: OT: help needed; asymmetric load after rectifier seems to disrupt its working.

2011-06-16 Thread DJ Delorie
When you put two capacitors in series, there's no way to know what the voltage between them will be. You have three with a common central connection Vx. V1 acts to charge the node, the loads act to discharge it, so an unequal load means unequal discharging and thus nonzero average node voltage.

Re: gEDA-user: OT: help needed; asymmetric load after rectifier seems to disrupt its working.

2011-06-16 Thread John Griessen
On 06/16/2011 01:30 PM, myken wrote: see Rectifier_sim.jpeg) Everything works fine if LOAD_1 and LOAD_2 are equal. Lose C1. Lose R1. Add L2 feeding D1. Separate D1 D2. Add some rc filter R between D2, C2. Or try moving L1 between D2, C2 John ___

Re: gEDA-user: OT: help needed; asymmetric load after rectifier seems to disrupt its working.

2011-06-16 Thread myken
Thanks DJ, I had the same thought that Vx was floating somewhere unwanted, that's why I added the resistor (which didn't work). Gazing at this problem for a couple of days make me miss the obvious, just split the filter. Brilliant. I'll give it a try. Robert. On 16/06/11 20:48, DJ Delorie