Jonatan,
You missed my point. One pin from the net is vissible. The other net
pins are hidden thus reducing symbol bloat.
You can have seperate nets for the core voltage, various IO voltages,
termination voltages, reference voltages etc.
But for each mostly hidden net you expose one pint.
I like partially embeded nets. Large chips, even small ones might have
several power pins which are internally connected. Rather then bloat a
symbol showing all of these pins, I like to make a embeded or hidden net
that includes all these pins and then make one of these pins visible.
The netlister
On fre, 2007-07-13 at 06:10 -0700, Steve Meier wrote:
Jonatan,
You missed my point. One pin from the net is vissible. The other net
pins are hidden thus reducing symbol bloat.
Sorry if I was unclear, actually got that point and agreed with you that
this is a good way of doing it. However,
think your post got stuck in a spam filter somewhere... forwards it to
the list since I completely agree.
Forwarded Message
From: Magnus Danielson [EMAIL PROTECTED]
To: geda-user@moria.seul.org, [EMAIL PROTECTED]
Subject: Re: gEDA-user: Separate Vcc voltages
Date: Fri, 13
On fre, 2007-07-13 at 05:04 -0700, Steve Meier wrote:
I like partially embeded nets. Large chips, even small ones might have
several power pins which are internally connected. Rather then bloat a
symbol showing all of these pins, I like to make a embeded or hidden net
that includes all these
The external net name should over ride the internel net name.
Steve M.
Jonatan Åkerlind wrote:
On fre, 2007-07-13 at 06:10 -0700, Steve Meier wrote:
Jonatan,
You missed my point. One pin from the net is vissible. The other net
pins are hidden thus reducing symbol bloat.
Sorry
On Jul 13, 2007, at 8:07 AM, Jonatan Åkerlind wrote:
On fre, 2007-07-13 at 06:10 -0700, Steve Meier wrote:
Jonatan,
You missed my point. One pin from the net is vissible. The other net
pins are hidden thus reducing symbol bloat.
Sorry if I was unclear, actually got that point and agreed
Maybe unreleased but not unavailable. Plus the ideas are always open for
use.
One idea that I have been rolling around in my brain is to drop the c
code for reading and writting the schematic files and replace it with a
scripted front end. The idea being that since there are differences
between
On Jul 13, 2007, at 9:42 AM, Jonatan Åkerlind wrote:
On fre, 2007-07-13 at 09:14 -0600, John Doty wrote:
Sorry if I was unclear, actually got that point and agreed with you
that
this is a good way of doing it. However, can the internal net
name be
Vdd or Vcc? Does the external connection
On fre, 2007-07-13 at 09:14 -0600, John Doty wrote:
Sorry if I was unclear, actually got that point and agreed with you
that
this is a good way of doing it. However, can the internal net name be
Vdd or Vcc? Does the external connection override the internal net
name?
Remember that
I agree. It goes with DJ's idea to have bus pins have multiple pin
numbers as well.
Steve Meier
On Fri, 2007-07-13 at 09:58 -0600, John Doty wrote:
On Jul 13, 2007, at 9:42 AM, Jonatan Åkerlind wrote:
On fre, 2007-07-13 at 09:14 -0600, John Doty wrote:
Sorry if I was unclear, actually got
i have actually used this feature myself.
from a standard release of gEDA
steve can you hook up another steve?
On Jul 13, 2007, at 8:14 AM, John Doty wrote:
On Jul 13, 2007, at 8:07 AM, Jonatan Åkerlind wrote:
On fre, 2007-07-13 at 06:10 -0700, Steve Meier wrote:
Jonatan,
You missed
12 matches
Mail list logo
