Hi, A screen shot showing possible bus-nesting is at:
http://www2.eng.cam.ac.uk/~pcjc2/geda/hierarchical_bus_example.png http://www2.eng.cam.ac.uk/~pcjc2/geda/hierarchical_bus_example2.png I've been calling this "hierarchical buses", but actually this is more "nesting". The hierarchy bit will come when you can have "bus pins" plumbing these buses straight into a sub-circuit or symbol. The second example shows breaking into a bus by "path", such as "address_bus/A0". I'm thinking more along the lines of hierarchical naming, than "netname" naming here: Putting signals "A", "B" and "C" in a bus called "foo", for example, makes the hierarchical net-names: "foo/A" "foo/B" "foo/C" A bus-ripper attached to "foo" might have an attribute "ripout=A", to get A. Now imagine C is actually a bus representing a LVDS pair (say): "C/plus" "C/minus" If you wanted, you "could" rip "C/minus" from the outer bus "foo", directly, with a bus-ripper with "ripout=C/minus". This would be an alternative to splitting out bus "C" with "ripout=C", then splitting from that with "ripout=minus". -- Peter Clifton Electrical Engineering Division, Engineering Department, University of Cambridge, 9, JJ Thomson Avenue, Cambridge CB3 0FA Tel: +44 (0)7729 980173 - (No signal in the lab!) _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user