Art Fore wrote:
Also, can you do cross-probing between the schematic and layout?
Cross-probing, if you don't know, is where you have both the schematic
and layout open on the screen and they are linked so if you highlight a
net or component on the schemtic, it is highlighted in the layout and
[snip]
How large a schematic can the schematic capture handle?, That is, how
many pages, what sheet size.
There are no limits that I'm aware of on schematic size.
Does that schematic handle hierarchial schematics?
Yes. Just keep in mind that 1) bus hierarchy is not supported
I have not found any specifications to any of the gEDA programs. Could
some one point me to them or answer the following questions?
How large a pcb layout can PCB handle? That is, how many layers, what
board size, how many pads and components?
How large a schematic can the schematic capture
On Wed, Jul 19, 2006 at 04:49:14PM -0400, DJ Delorie wrote:
How large a pcb layout can PCB handle?
About a quarter of a mile per side. Yes, I've done this, my house
looks *really* small on that scale.
Just for the fun of it, I just tried to set a huge board size.
I got bumped back to 30
Just for the fun of it, I just tried to set a huge board size.
I got bumped back to 30 inches on a side. This is from the
Preferences/Sizes GUI in CVS PCB-HID-gtk.
I believe you in theory, but something artificially reduces the range.
Two minutes grepping around in the source tree didn't
On Wed, Jul 19, 2006 at 05:02:03PM -0400, DJ Delorie wrote:
Just for the fun of it, I just tried to set a huge board size.
I got bumped back to 30 inches on a side. This is from the
Preferences/Sizes GUI in CVS PCB-HID-gtk.
Try the lesstif HID. It doesn't have any of the arbitrary
On Wed, 2006-07-19 at 16:49 -0400, DJ Delorie wrote:
How large a pcb layout can PCB handle?
About a quarter of a mile per side. Yes, I've done this, my house
looks *really* small on that scale.
That is, how many layers,
If you don't mind editing one line of a .h file, as many as your
They all look like max bounds and probably should use the pcb's
actual width and height instead.
A 32-bit signed integer type is what limits you to 1/4 mile (er, 0.338
miles). If you need more than 0.338 miles on a side, yeah, you can
compile with long or long long but you'd have to go through
DJ Delorie wrote:
They all look like max bounds and probably should use the pcb's
actual width and height instead.
A 32-bit signed integer type is what limits you to 1/4 mile (er, 0.338
miles). If you need more than 0.338 miles on a side, yeah, you can
compile with long or long long but
On Wed, Jul 19, 2006 at 02:56:28PM -0700, Art Fore wrote:
We only need about 18 inches X 18 inches and up to 24 layers. How about
ground planes? Does it also handle split ground planes?
Heretic! Ground planes are by definition not split!
Fortunately for you, PCB is agnostic on the subject.
On Wed, 2006-07-19 at 15:09 -0700, [EMAIL PROTECTED] wrote:
On Wed, Jul 19, 2006 at 02:56:28PM -0700, Art Fore wrote:
We only need about 18 inches X 18 inches and up to 24 layers. How about
ground planes? Does it also handle split ground planes?
Heretic! Ground planes are by definition
At what point due to curvature of the earth would we be forced to move
from the cartesian coordinant system?
At 0.338 miles, the deviation due to earth's curvature is about a
quarter of an inch.
That doesn't mean we can't still build (or at least design) flat
things that big.
It would be SO nice to have gschem and/or PCB be able to use a
client/server component database. In fact I'm practically drooling
at the mere thought of it.
http://www.gedasymbols.org/csv.html
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