I would like to use Icarus Verilog for timing simulation. Is this possible?
I would have delay times for gates from another source (probably spice simulation). I'd like to generate a gate netlist using Icarus and then simulate it using the delay times. I sthis possible? If no, what would be the alternatives? Philipp _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user
