If I move line segments to other layers pcb tries to keep it connected and automagically places vias. Unfortunately it is a bit too diligent and places vias even when moving lines between silk and a layer that is a member of the component layer group. However, there are no superfluous vias if I move line segments from a solder layer to and from silk. Suggestion: Only place vias if line segments are transferred between component and copper layers.
---<(kaimartin)>-- -- Kai-Martin Knaak tel: +49-511-762-2895 Universität Hannover, Inst. für Quantenoptik fax: +49-511-762-2211 Welfengarten 1, 30167 Hannover http://www.iqo.uni-hannover.de GPG key: http://pgp.mit.edu:11371/pks/lookup?search=Knaak+kmk&op=get _______________________________________________ geda-user mailing list geda-user@moria.seul.org http://www.seul.org/cgi-bin/mailman/listinfo/geda-user