Here's another take on the options we have now: When you have need for some gates
less than a word width use tiny logic packaged in 4 or 6 or 8 pin packages and do not
create slots in the symbols at all, and get the benefit of less spaghetti wiring going
hither and yon. When you want 8 or 16
Is there anyway in gschem to have a list of descriptions per pin and then just
select which one must be shown?
e.g.
On a PIC16F628A pin 12 alone has four different functions :
RB6, T1OSO, T1CKI, and PGC
When I try to add all the pin descriptions to a PIC microcontroller it ends up
having to be a
On Fri, Jun 25, 2004 at 05:36:22PM +0200, Levente KOVACS wrote:
> > 1) Implicit connections are good when they help minimize the crowding
> > of a schematic.
>
> ...
>
> > 3) Implict connections are bad for high speed analog where you want to
> >
> > filter the devices power from the boards powe
> 1) Implicit connections are good when they help minimize the crowding
> of a schematic.
...
> 3) Implict connections are bad for high speed analog where you want to
>
> filter the devices power from the boards power.
I think even a normal TTL gate generates noise on the top of the power
supp
On Friday 25 June 2004 07:20 am, Stephen Meier wrote:
> 1) Implicit connections are good when they help minimize the crowding
> of a schematic.
Just have a separate page that has nothing but power connections on it.
Problem solved. This is a very common practice.
> 2) Others who then look at t
Em Sex 25 Jun 2004 10:59, Karel Kulhavy escreveu:
> On Fri, Jun 25, 2004 at 09:38:10AM -0300, Xtian Xultz wrote:
> > Em Qui 24 Jun 2004 21:47, Paul Surgeon escreveu:
> >
> > We made a new library here. We use to have the integrated circuit in one
> > symbol and one symbol with only the power pins.
On Friday 25 June 2004 06:57 am, Karel Kulhavy wrote:
> I have had some problems with implicit connections on Ronja.
>
> What's the alternative for implicit connections? Each gate symbol with
> power pins? Or 7th gate that has power and gnd pins?
Taking a 7400 as an example, you would have five ga
1) Implicit connections are good when they help minimize the crowding of
a schematic.
2) Others who then look at the schematic often ask where is the power
and ground (not for ttl since it allways found on the same spot for
conventionally shapped chips)
3) Implict connections are bad for high
On Fri, Jun 25, 2004 at 09:38:10AM -0300, Xtian Xultz wrote:
> Em Qui 24 Jun 2004 21:47, Paul Surgeon escreveu:
>
> We made a new library here. We use to have the integrated circuit in one
> symbol and one symbol with only the power pins. Both must have the same name,
> like U1. To me, it is sim
On Fri, Jun 25, 2004 at 02:13:09PM +0200, Magnus Danielson wrote:
> From: Dan McMahill <[EMAIL PROTECTED]>
> Subject: Re: gEDA-user: 74xx series
> Date: Thu, 24 Jun 2004 20:53:16 -0400
> Message-ID: <[EMAIL PROTECTED]>
>
> Dan,
>
> > On Fri, Jun 25, 2004 at 02:47:48AM +0200, Paul Surgeon wrote:
>
Em Qui 24 Jun 2004 21:47, Paul Surgeon escreveu:
We made a new library here. We use to have the integrated circuit in one
symbol and one symbol with only the power pins. Both must have the same name,
like U1. To me, it is simple to draw, makes the design clean and with a
consistent netlist.
>
From: Dan McMahill <[EMAIL PROTECTED]>
Subject: Re: gEDA-user: 74xx series
Date: Thu, 24 Jun 2004 20:53:16 -0400
Message-ID: <[EMAIL PROTECTED]>
Dan,
> On Fri, Jun 25, 2004 at 02:47:48AM +0200, Paul Surgeon wrote:
> > How does one wire up the power on the 74xx series of chips in gschem?
> > There
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