Dan McMahill wrote:
I just checked in a bug fix in that area. You might do a cvs update
and try again. If you want to just change that one line, its in
libgeda/noweb/f_basic.nw
[..]
After updating my source tree and recompiling, I get just another core
dump, but I think the backtrace is basical
On Thu, 03 Feb 2005 23:10:27 +0100, Christoph Lechner <[EMAIL PROTECTED]> wrote:
> gdb tells me:
> #0 0xb7e2f137 in g_list_find_custom () from /usr/lib/libglib-2.0.so.0
>
> I'm not used to analyize core dumps, but IMO this says that something
> with GTK+ went wrong.
One small clarification: it d
Define 'sick'.
- Original Message -
From: "Piotr R." <[EMAIL PROTECTED]>
To:
Sent: Wednesday, February 02, 2005 6:45 PM
Subject: gEDA-user: autorouter
> Hello,
>
> When I try to autoroute pcb boards in (x)PCB it sometimes produces
> 'sick' results.
>
> Does anybody know if it is be
On Fri, Feb 04, 2005 at 12:42:55AM +0100, Christoph Lechner wrote:
>
> >* Your backtrace shows that the pointer w_current changes its hex
> >value as you make successive function calls. This suggests a memory
> >management problem or a loose pointer. We have been hacking a lot in
> >that partic
Hello,
I saw a little problem with a symbol BC557-1.sym. The arrow isn't on the
good branch. I've reworked it graphically and I join it to this mail.
Cordially.
BTW: I'm on Debian/Sarge and I fail to update with the 20041228 version
because of a lack of geda-symbols and libgeda22. Is there someo
Stuart Brorson wrote:
I can open and netlist (-g drc2) your schematic fine:
[..]
* Are your RC files OK? IN particular, verify that the file
"/home/cl/geda/share/gEDA/system-gafrc" exists and is readable. Since
you can run gschem, it is probably OK.
This file does exist on my system and is reada
Also, please post what you have in the file libgeda/config.h.
I am wondering if your system doesn't have strcmp, or it lives in a
strange place, or it has been substituted for something else. . . .
Stuart
>
> This is a multi-part message in MIME format.
> --0101050008060804020308
I can open and netlist (-g drc2) your schematic fine:
-
[EMAIL PROTECTED] ~/Christoph]$ gnetlist -g drc2 -o testschem.drc testschem.sch
gEDA/gnetlist version 20041228
gEDA/gnetlist comes with ABSOLUTELY NO WARRANTY; see COPYING for more d
Stuart Brorson wrote:
As always, a backtrace from within gdb would say a lot.
BTW: I accidently send one posting to Dan McMahill via PM,
but this one guest to the list ;)
(gdb) bt
#0 0xb7e2f137 in g_list_find_custom () from /usr/lib/libglib-2.0.so.0
#1 0xb7fd1a60 in g_rc_parse_general (w_current=
As always, a backtrace from within gdb would say a lot.
Also, please post your schematic.
Thanks,
Stuart
>
> Hello,
>
> after successfully building the geda CVS version (files in CVS geda/devel
> as of 3rd of Feb. 05), I did a test with a simply schematic (only one
> chip and
> a wire from
Hello,
after successfully building the geda CVS version (files in CVS geda/devel
as of 3rd of Feb. 05), I did a test with a simply schematic (only one
chip and
a wire from one pin to another). gschem did fine, but gnetlist dumps
core when
executing:
gnetlist -g PCBboard -o testschem.pcb testsche
Ok, there is missing semi-columns in your statement, "make" will put all
lines ended with "\" together in a single line
if cmd1; then cmd2; else cmd3; fi
Although, personally, I prefer to not use bash to do ifs in Makefiles.
so:
$(objects).drc : $(objects).sch
gnetlist -g drc2 $(object
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
Konstantin Savenkov wrote:
| I want to integrate hardware components, written in Verilog, to our simulation
| modeling environment. It seems convinient to translate Verilog module in C++
| and use a proper wrapper, which provides the interface, required
I want to integrate hardware components, written in Verilog, to our simulation
modeling environment. It seems convinient to translate Verilog module in C++
and use a proper wrapper, which provides the interface, required by a runtime
of the environment.
I've found in the archive of this list
14 matches
Mail list logo
