Just jumping in here...
[snip]
>> I wasn't talking about the physical loading of the SOF into the chip, I
>> was talking about the *generation* of the SOF on the development host
>> from EDIF (Icarus Verilog output), i.e., the fitter, place and route,
>> and final SOF generator.
>>
>> MS
On 10/23/05, Michael Sokolov <[EMAIL PROTECTED]> wrote:
> Antonio Bergnoli <[EMAIL PROTECTED]> wrote:
>
> > I know two of such open source software:
> > -flexloader
> > -openwince-jtag
>
> I wasn't talking about the physical loading of the SOF into the chip, I
> was talking about the *generation* o
Antonio Bergnoli <[EMAIL PROTECTED]> wrote:
> I know two of such open source software:
> -flexloader
> -openwince-jtag
I wasn't talking about the physical loading of the SOF into the chip, I
was talking about the *generation* of the SOF on the development host
from EDIF (Icarus Verilog output), i
I know two of such open source software:
-flexloader
-openwince-jtag
But they can't programming all Altera device, only a little set of
FPGA(a subset of Flex serie).
I never heard about nothing of such things pertaining Cyclone family
Hello fellow Open Source Hardware lovers,
I wonder, hav
Hello fellow Open Source Hardware lovers,
I wonder, have any of you heard of an open source project that has reverse-
engineered the Altera SOF format and can generate an SOF from scratch
without using any proprietary software, i.e., without Quartus? Knowing
how much grief open source hardware de
