RE: gEDA-user: trace calculation[Scanned]

2006-01-09 Thread Robert Thorpe
> -Original Message- > From: [EMAIL PROTECTED] > [mailto:[EMAIL PROTECTED] On Behalf Of Dave McGuire > Sent: 06 January 2006 02:12 > To: geda-user@seul.org > Subject: Re: gEDA-user: trace calculation[Scanned] > > On Jan 5, 2006, at 4:27 PM, DJ Delorie wrote:

RE: gEDA-user: trace calculation

2006-01-09 Thread Robert Thorpe
> -Original Message- > From: [EMAIL PROTECTED] > [mailto:[EMAIL PROTECTED] On Behalf Of Dan McMahill > Sent: 05 January 2006 22:07 > To: geda-user@seul.org > Subject: Re: gEDA-user: trace calculation > > Robert Thorpe wrote: > > Microvias in particular

Re: gEDA-user: trace calculation

2006-01-06 Thread DJ Delorie
> I suggest it to be W and not W/2. Then the width "bump" would be 0. I wasn't describing a change. I was describing the way it already happens to work.

Re: gEDA-user: trace calculation

2006-01-06 Thread Karel Kulhavy
On Fri, Jan 06, 2006 at 09:12:09AM -0500, DJ Delorie wrote: > > > > As an FYI, pcb always uses round flashes for traces. A trace of width > > > W has a corner with radius W/2 on the outside, not a sharp 90 degree > > > > Why W/2 and not W? > > The diameter of the rounded ends of traces is W, to

Re: gEDA-user: trace calculation

2006-01-06 Thread DJ Delorie
> > As an FYI, pcb always uses round flashes for traces. A trace of width > > W has a corner with radius W/2 on the outside, not a sharp 90 degree > > Why W/2 and not W? The diameter of the rounded ends of traces is W, to match the thickness. Therefor the radius is W/2. That's just the way it

Re: gEDA-user: trace calculation

2006-01-06 Thread Karel Kulhavy
On Thu, Jan 05, 2006 at 09:03:57PM -0500, DJ Delorie wrote: > > As an FYI, pcb always uses round flashes for traces. A trace of width > W has a corner with radius W/2 on the outside, not a sharp 90 degree Why W/2 and not W? CL< > angle like the PDF's reports. That probably eliminates even the

Re: gEDA-user: trace calculation

2006-01-06 Thread Karel Kulhavy
On Thu, Jan 05, 2006 at 01:39:11PM -0500, DJ Delorie wrote: > > > Why? Via doesn't have much more inductance than a piece of trace, > > does it? > > At high enough frequencies, traces are waveguides, not just > conductors. Vias have nontrivial geometry relative to the signal. > > That reminds m

Re: gEDA-user: trace calculation

2006-01-06 Thread Karel Kulhavy
On Thu, Jan 05, 2006 at 02:17:36PM -0500, DJ Delorie wrote: > > > is that it is enough to just miter the corners of a 90degree bend, > > or (better) use two 45 degree bends to transition between a 90 > > degree bend for all but the very highest frequencies. > > Would it be useful to add an optimi

Re: gEDA-user: trace calculation

2006-01-05 Thread Al Davis
On Thursday 05 January 2006 05:21 am, Karel Kulhavy wrote: > Would it be possible to enter material constants and layer > ordering into the PCB and then make a function that would > display resistance, inductance and capacitance of a track > (alone or with reference to infinite groundplane at a > d

Re: gEDA-user: trace calculation

2006-01-05 Thread Al Davis
> On Thu, Jan 05, 2006 at 08:13:23AM -0800, Larry Doolittle wrote: > > I don't even need to handle vias -- the critical nets > > that this would be used on most shouldn't use vias. :-p On Thursday 05 January 2006 01:16 pm, Karel Kulhavy wrote: > Why? Via doesn't have much more inductance than a

Re: gEDA-user: trace calculation[Scanned]

2006-01-05 Thread daedalworks
Vias also have problems with continuity of the ground plane.  There was a white paper a couple years ago that showed good results with four ground vias arranged around the signal via (I forget what they did for differential pairs).  Unfortunately, I don't have a copy any more :-(   ---

Re: gEDA-user: trace calculation

2006-01-05 Thread Dave McGuire
On Jan 5, 2006, at 4:27 PM, DJ Delorie wrote: Isn't tuning trace _lengths_ more important on pcbs than what types of corners you're using? On my AMD motherboard, the bus traces have s-shaped wiggles in them to keep the lengths all the same. Rounded corners, too. I have several boards from

Re: gEDA-user: trace calculation

2006-01-05 Thread DJ Delorie
As an FYI, pcb always uses round flashes for traces. A trace of width W has a corner with radius W/2 on the outside, not a sharp 90 degree angle like the PDF's reports. That probably eliminates even the trivial differences between corners. An arc corner would get rid of the 90 degree inside tra

Re: gEDA-user: trace calculation

2006-01-05 Thread daedalworks
round corners are slightly better.   -- Original message -- From: DJ Delorie <[EMAIL PROTECTED]> > > > My experience at ~1GHz (2Gbps FibreChannel) is that the difference > > between round corners and 45 degree pairs is small, but if you're > > pushing the limits like we wer

Re: gEDA-user: trace calculation[Scanned]

2006-01-05 Thread Dan McMahill
Robert Thorpe wrote: Microvias in particular are thin and have significant inductive reactance at high frequencies. Normal vias are not so bad. you can minimize the effect of a via by nominally matching it to the trace. In other words by varying the via diameter you have a handle on its impe

Re: gEDA-user: trace calculation

2006-01-05 Thread John Doty
On Jan 5, 2006, at 2:17 PM, Phil Taylor wrote: Or another way to consider this: Isn't it possible to make a trace that a certain frequency cannot pass through due to nothing other than its length? Nope. One of the simplest solutions to Maxwell's equations is a wave attached to an infi

Re: gEDA-user: trace calculation

2006-01-05 Thread DJ Delorie
> My experience at ~1GHz (2Gbps FibreChannel) is that the difference > between round corners and 45 degree pairs is small, but if you're > pushing the limits like we were, it can be significant. Which way was better?

Re: gEDA-user: trace calculation

2006-01-05 Thread daedalworks
My experience at ~1GHz (2Gbps FibreChannel) is that the difference between round corners and 45 degree pairs is small, but if you're pushing the limits like we were, it can be significant.  The biggest problem we had with round corners was a CAD package that generated gerbers with line segments fo

Re: gEDA-user: trace calculation

2006-01-05 Thread DJ Delorie
> The rounded corners are probably overkill. I guessed that. Maybe they've found it improves their quality or yield. Maybe they just think it looks pretty.

Re: gEDA-user: trace calculation

2006-01-05 Thread Larry Doolittle
On Thu, Jan 05, 2006 at 04:27:20PM -0500, DJ Delorie wrote: > > On my AMD motherboard, the bus traces have s-shaped wiggles in them to > keep the lengths all the same. Rounded corners, too. The rounded corners are probably overkill. Those traces have to carry 3.2 GB/s, IIRC. So response up to

Re: gEDA-user: trace calculation

2006-01-05 Thread DJ Delorie
> Isn't tuning trace _lengths_ more important on pcbs than what types > of corners you're using? On my AMD motherboard, the bus traces have s-shaped wiggles in them to keep the lengths all the same. Rounded corners, too.

Re: gEDA-user: trace calculation

2006-01-05 Thread Larry Doolittle
Phil et al. - On Thu, Jan 05, 2006 at 04:17:44PM -0500, Phil Taylor wrote: > > 50 ohm hard coax makes sharp bends all the time, but it's still 50 ohm. > Reflections do exist but they're way down. This is no doubt because the parts > are designed very carefully. Right. Someone tuned the excess

Re: gEDA-user: trace calculation

2006-01-05 Thread Phil Taylor
DJ Delorie <[EMAIL PROTECTED]> wrote: > makes the board look pretty, but I wonder if gentle curves provide > better waveguide performance than corners? > 50 ohm hard coax makes sharp bends all the time, but it's still 50 ohm. Reflections do exist but they're way down. This is no doubt because

Re: gEDA-user: trace calculation

2006-01-05 Thread Stuart Brorson
> > is that it is enough to just miter the corners of a 90degree bend, > > or (better) use two 45 degree bends to transition between a 90 > > degree bend for all but the very highest frequencies. > > Would it be useful to add an optimization that puts rounded corners on > 90s instead of miters? W

Re: gEDA-user: trace calculation

2006-01-05 Thread Gene Heskett
On Thursday 05 January 2006 13:39, DJ Delorie wrote: >> Why? Via doesn't have much more inductance than a piece of trace, >> does it? > >At high enough frequencies, traces are waveguides, not just >conductors. Vias have nontrivial geometry relative to the signal. > >That reminds me of another opti

Re: gEDA-user: trace calculation

2006-01-05 Thread DJ Delorie
I've detailed this in the past, but to summarize: > -You would need to have some way for the program to in advance how much > angle (arc) you wanted to cover. It's automatic. The straight parts are always tangents to the curves around obstacles. See the png I posted. > -You can probably pac

Re: gEDA-user: trace calculation

2006-01-05 Thread DJ Delorie
> is that it is enough to just miter the corners of a 90degree bend, > or (better) use two 45 degree bends to transition between a 90 > degree bend for all but the very highest frequencies. Would it be useful to add an optimization that puts rounded corners on 90s instead of miters? We already h

Re: gEDA-user: trace calculation

2006-01-05 Thread joeft
DJ Delorie wrote: Why? Via doesn't have much more inductance than a piece of trace, does it? At high enough frequencies, traces are waveguides, not just conductors. Vias have nontrivial geometry relative to the signal. That reminds me of another optimization I'd like to implement in the

Re: gEDA-user: trace calculation

2006-01-05 Thread DJ Delorie
> That reminds me of another optimization I'd like to implement in the > future. It would look like this: http://www.delorie.com/pcb/pullit-sample.png

Re: gEDA-user: trace calculation

2006-01-05 Thread Stuart Brorson
> > Why? Via doesn't have much more inductance than a piece of trace, > > does it? > > At high enough frequencies, traces are waveguides, not just > conductors. Vias have nontrivial geometry relative to the signal. Indeed. Folks doing > 1GHz design (to name a rough cut-off point) spend a lot of

RE: gEDA-user: trace calculation[Scanned]

2006-01-05 Thread Robert Thorpe
l.org > Subject: Re: gEDA-user: trace calculation[Scanned] > > > > Why? Via doesn't have much more inductance than a piece of > trace, does > > it? > > At high enough frequencies, traces are waveguides, not just > conductors. Vias have nontrivial geo

Re: gEDA-user: trace calculation

2006-01-05 Thread DJ Delorie
> Why? Via doesn't have much more inductance than a piece of trace, > does it? At high enough frequencies, traces are waveguides, not just conductors. Vias have nontrivial geometry relative to the signal. That reminds me of another optimization I'd like to implement in the future. Instead of c

Re: gEDA-user: trace calculation

2006-01-05 Thread Matt Ettus
> Why? Via doesn't have much more inductance than a piece of trace, does > it? It does. Impedance changes of any kind are bad for high speed signals. Matt

Re: gEDA-user: trace calculation

2006-01-05 Thread Karel Kulhavy
On Thu, Jan 05, 2006 at 08:13:23AM -0800, Larry Doolittle wrote: > Friends - > > On Thu, Jan 05, 2006 at 11:21:40AM +0100, Karel Kulhavy wrote: > > Would it be possible to enter material constants and layer ordering into > > the PCB and then make a function that would display resistance, > > induc

Re: gEDA-user: trace calculation

2006-01-05 Thread Larry Doolittle
Friends - On Thu, Jan 05, 2006 at 11:21:40AM +0100, Karel Kulhavy wrote: > Would it be possible to enter material constants and layer ordering into > the PCB and then make a function that would display resistance, > inductance and capacitance of a track (alone or with reference to > infinite groun

gEDA-user: trace calculation

2006-01-05 Thread Karel Kulhavy
Would it be possible to enter material constants and layer ordering into the PCB and then make a function that would display resistance, inductance and capacitance of a track (alone or with reference to infinite groundplane at a different given layer)? You would define starting and ending point and